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标准SDR SDRAM控制器参考设计_verilog_lattice
- 标准SDR SDRAM控制器参考设计，Lattice提供的verilog源代码-standard SDR SDRAM controller reference design, the Lattice Verilog source code
sdram
- sdram控制器 这里考虑将SDRAM控制器结合目前项目开展来做相应的模块，而不做SDRAM通用控制器，这样也是考虑了FPGA的器件资源而采取的措施。同时编写的逻辑简单，没有多余的逻辑资源有利于提高控制器的速度，满足最后的设计要求。-SDRAM controller here consider SDRAM controller current projects do the corresponding module, but not so common SDRAM controller, a
very-good-ok-ref-ddr-sdram-verilog
- Sdr SDRAM控制器参考设计,很好的-Sdr SDRAM controller reference design, very good
SDRAM
- 基于FPGA的SDRAM控制器的设计和实现,还比较好勒.
ref-sdr-sdram-vhdl
- 标准SDR SDRAM控制器参考设计_verilog_lattice\\sdr_ctrl.v
DDR（双速率）SDRAM控制器参考设计verilog代码
- DDR SDRAM reference design documentation
DDR（双速率）SDRAM控制器参考设计VHDL代码
- SDRAM的控制程序很复杂，这个对大家肯定有帮助！
sdram_design
- SDRAM存取控制器设计书，包含标准的SDRAM读写控制功能，和自动刷新功能。对VHDL设计初学者很有帮助。密码MMCTEAM。-SDRAM access controller design books, contain standard SDRAM read and write control functions, and auto refresh function. VHDL design helpful for beginners. Password MMCTEAM.
sdram_all
- sdram 控制器的verilog 实现，包括用户逻辑和控制器的设计-SDRAM controller Verilog realization, including user logic and controller design
DDR_SDRAM_controller
- DDR SDRAM控制器的VHDL源代码，含详细设计文档。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock Manager (DCM) provides t
ref-sdr-sdram-verilog
- 标准SRD SDRAM控制器参考设计，altera提供 Verilog代码,带有使用手册，大家试试交流一下 -Standard SRD SDRAM controller reference design, altera provide Verilog code, with user manual, we try to exchange some
sdram
- 在ISE开发环境下的单速率SDRAM简单读写控制器设计，用的是verilog硬件描述语言-ISE development environment in a single-rate SDRAM controller read and write simple design, using the verilog hardware descr iption language
sdram_controller
- SDRAM 控制器的 verilog 源代码, 针对Micron 的SDRAMS设计,支持全部的指令, 已经经过逻辑验证,并实际用在芯片设计中,作为一个模块,正常工作.-SDRAM controller verilog source code, for Micron' s SDRAMS designed to support all of the instructions, the logic has been verified, and actually used in chip des
SDRAM-controller-design-FPGA-based
- 基于FPGA的SDRAM控制器设计及应用硕士论文-SDRAM controller design FPGA based
1-SDRAM
- 基于FPGA的SDRAM控制器的设计和实现源代码 -FPGA-based SDRAM controller design and implementation source code
controller-design-of-sdram-
- 基于FPGA对sdram控制器的设计（VERILOG语言）-FPGA-based controller design of sdram (VERILOG language)
SDR_SDRAM_IP
- SDR SDRAM 控制器，Altera官网重要资料。内涵说明文档，和VHDL与Verilog两种设计IP。-SDR SDRAM controller from Altera
标准SDR SDRAM控制器参考设计，Lattice提供
- 说明： SDR SDRAM 控制器 来自lattice 已经分析代码可用!大家可以参考修改，形成自己的实例(Descr iption: SDR SDRAM controller from lattice has been analyzed code available, we can refer to modify, to form their own examples)
A15_SDRAM_100M_HZ
- 基于Nios II的SDRAM控制设计，包括工程、程序以及仿真。(The design of SDRAM control based on Nios II, including engineering, program and simulation.)
sdram_uart
- sdram控制器的设计，包括 ：初始化、刷新模块、读写模块、命令解析模型的编写，通多串口发送接收数据验证设计的正确性(The design of SDRAM controller includes initialization, refresh module, read and write module, command parsing model, and the correctness of data verification design by sending and receiving