搜索资源列表
AMBA-Bus_Verilog_Model
- 该源码包是2.0版本的AMBA总线的Verilog语言模型，主要包括5个部分：AHB总线仲裁器，AHB-APB总线桥接器，AHB总线上从设备ROM模型，AHB总线上从设备RAM模型，参数定义。-This source code package is the model of V2.0 AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_R
APB
- It s the verilog source code for AMBA APB 2.0 Slave
a_vhdl_8253_timer_latest.tar
- 一个apb总线控制8253的verilog源代码，符合标准的amba 2.0的总线规范-A apb bus control 8253 of the verilog source code, amba 2.0 standard bus specification
APB
- 这是一篇关于APB的源代码，是很好的例子-This is a story about APB' s source code, is a good example of
code
- 用system verilog 描述的APB总线验证源码，可以用于学习system verilog的使用。-System Verilog descr iption APB bus test source code, can be used to study the use of system Verilog
apbctrl
- amba2.0标准，apb总线控制器的实现，来自leon3开源代码-amba2.0 standard the implementation of apb bus controller, from leon3 open source code.
Actel_DirectCore_CORESPI_4.2.116
- Actel DirectCore CORESPI 4.2.116 Verilog and VHDL RTL source files for SPI controller on APB
ozmain
- mmp APB clock operation source file.
moxa-moxart-watchdog
- mmp APB clock operation source file.
interrupt_controller
- 中断控制器电路verilog实现源代码,silicon验证的.-interrupt controller IP source code, APB interface.
timer
- Simple 32-bit timer realization with APB interface with support of interrupt generation and switching clock source.
apb_uart
- 这里是apb总线设计代码。这个源程序是基于verilog语言设计的(Here is the APB bus design code. This source program is designed based on Verilog language)