搜索资源列表
Pseudo-random-code
- 基于FPGA实现的伪随机序列快速同步.rar
trunk-hdlc.rar
- 高级链路层协议的实现，vhdl，fpga,- 8 bit parallel backend interface - use external RX and TX clocks - Start and end of frame pattern generation - Start and end of frame pattern checking - Idle pattern generation and detection (all ones) - Idle pattern
khalil2006_true_random_number_generator
- a true random number generator (TRNG) in hardware which is targeted for FPGA-based crypto embedded systems. All crypto protocols require the generation and use of secret values that must be unknown to attackers.Random number generators (RNG) are requ
digitaloscilloscope
- This digital oscilloscope takes a MCU and FPGA as the core. We made emphases on the choice of the sampling methods and the implement of equivalent sampling as a result, our design not only has the real-time sampling mode but also can reach the highes
2007
- 本数字示波器以单片机和FPGA为核心，对采样方式的选择和等效采样技术的实现进行了重点设计，使作品不仅具有实时采样方式，而且采用随机等效采样技术实现了利用实时采样速率为1MHz的ADC进行最大200MHz的等效采样。-The digital oscilloscope and a single-chip FPGA as the core, the choice of the sampling methods and the equivalent sampling technique designed
Pseudo_Random_Num_Generator
- The file included is the source code for Pseudo Random Generator
prbs-FPGA
- 。本文 给出了基于线性反馈移位寄存器电路，并结合FPGA 的特有结构，设计了一种简捷而又高效的伪随机序列产生方法。-. In this paper, based on linear feedback shift register circuit, combined with the unique structure of the FPGA, the design of a simple and efficient method for pseudo-random sequence.
pseudo-random-sequence-generator-
- 利用FPGA编程--- -实现“伪随机序列发生器设计”-FPGA programming------- pseudo-random sequence generator design
Pseudo-random
- 伪随机序列FPGA应用设计代码 Pseudo-random sequence-Pseudo-random sequence of application design
FPGA--SDRAM
- SDRAM:Synchronous Dynamic Random Access Memory- 同步动态随机存储器，同步是指 Memory工作需要同步时钟，内部的命令的发送与数据的传输都以它为基准；动态是指存储阵列需要不断的刷新来保证数据不丢失；随机是指数据不是线性依次存储，而是自由指定地址进行数据读写。
random-maze
- 采用verilg语言并结合VGA显示、PS2接口技术、键盘输入等实现基于FPGA开发板的可选择性迷宫游戏。可以利用电脑键盘和显示器来玩这个游戏-Verilg language and to combine VGA display and the PS2 interface technology, the keyboard input to achieve optional FPGA development board based maze game. Can use the computer k
FPGA-RAND
- FPGA生成伪随机数,希望对加密的童鞋有用-FPGA generates pseudo-random numbers, we want to be useful
random
- 伪随机序列应用设计，应用与产生伪随机序列，FPGA实现-Pseudo-random sequence application design, application and generate a pseudo-random sequence, FPGA realization
FPGA-2048
- 一开始方格内会随机出现2这个小数字，每次可以选择上下左右其中一个方向去滑动，每滑动一次，所有的数字方块都会往滑动的方向靠拢外，系统也会在空白的地方乱数出现一个数字2或4方块，出现2的概率是出现4的概率的3倍，相同数字的方块在靠拢、相撞时会相加。系统给予的数字方块不是2就是4，玩家要想办法在这小小的16格范围中凑出“2048”这个数字方块。断的叠加最终拼凑出2048这个数字就算成功通关。当所有16格数字已满，无法叠加，且没有出现2048这个数字则算游戏失败。-Will randomly appea
random_num_gen
- 通过随机数产生原理进行verilog编程，从而实现FPGA的随机数产生(Through random number generation principle for Verilog programming, so as to achieve the FPGA random number generation)
基于FPGA的高斯分布随机数的生成_姚若河
- 介绍了一种利用fpga硬件平台产生高斯随机数的算法(An algorithm for generating Gauss random numbers using FPGA hardware platform is introduced)
基于FPGA的高斯随机数发生器的设计与实现_徐新才
- 介绍了一种利用FPGA硬件平台生成高斯随机数的算法。(An algorithm for generating Gauss random numbers using FPGA hardware platform is introduced)
基于FPGA的高速高斯随机数发生器_陆兴平
- 介绍了一种利用FPGA硬件平台生成高斯随机数的算法(An algorithm for generating Gauss random numbers using FPGA hardware platform is introduced.)
30085
- turbo c writing, and random fireworks animation, size, color, make their own adjustments. the the
PROJECT4
- 设计一个简易数字信号传输性能分析仪，实现数字信号传输性能测试；同时，设计三个低通滤波器和一个伪随机信号发生器用来模拟传输信道。(A simple digital signal transmission performance analyzer is designed to test the transmission performance of the digital signal. At the same time, three low-pass filters and a pseudo-ra