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FIR
- FIR结构数字滤波器，64阶。在Altera FPGA上验证通过-FIR digital filter structure, 64 bands. Verified by the Altera FPGA on the
Fir-40ntap-4order
- Fir filter with 40tap, 4 order
FIR
- 基于FPGA的FIR滤波器实现，含全部不源代码-FPGA-based FIR filter, including all non-source code
FIR
- 基于FPGA的FIR滤波器设计思想，里面有很好的算法供大家参考-FPGA-based FIR filter design ideas, there are very good for your reference algorithm
vhdl
- FIR滤波器的性能参数 设计一个滤波器最基本的就是性能参数的,决定着滤波器的实际功能.比如阶数,截至频率。 本文滤波器设计参数 ①输入,输出数据宽度10位 ②阶数为4阶的线性相位FIR滤波器， ③类型:带通 -FIR filter performance parameters The design of a filter is the most basic performance parameters, determines the actual filter fu
fir-vhdl-code
- FIR FILTER CODE with VHDL
fir
- code for fir filter see it is from altera site.-code for fir filter see it is from altera site.
fir
- 利用VHDL语言，设计了一个11阶的FIR滤波器。简单易懂-The use of VHDL language, designed a 11-order FIR filter. Easy to understand. .
reload_fir
- 这是我在Xilinx公司的FPGA上实现的FIR滤波器，调用的内部核，其特色是可以用较少的资源实现该功能，而且可以实现参数重载，即从外部MCU设置FIR滤波器的参数-This is my Xilinx FPGA to achieve the FIR filter, called internal audit, its characteristics can be achieved with fewer resources to this function, and the overload p
FIR
- fir filter design using vhdl codes
FIR
- FIR滤波器的VHDL源代码及测试文件，已通过编译仿真，绝对正确。-FIR filter VHDL source code and test files, has passed the compiled simulation, absolutely correct.
fir
- 先用matlab得到所需滤波器的系数，将AD采样的数据经过fir滤波器后输出-First to use matlab to obtain the required filter coefficients, data from the AD sample, after the output filter through the fir
FIR
- FIR filter up to 128x
fir
- Verilog编的fir滤波器，可以自己输入参数序列，产生滤波波形-Verilog compiled fir filter, input parameters can be their own sequence, resulting in filtered waveforms
fir
- 数字电路设计中的，fir滤波器设计，我做的是8位宽的，利用vhdl实现，附带了完整的代码，报告，我没有对我的信息进行删除，是希望大家能够诚实的利用这个代码，提高自身本领。-Digital circuit design, fir filter design, I am doing is 8 bits wide, using vhdl implementation, with a complete code, the report, I did not delete my information i
fir
- 是一个fir滤波器 其中使用了MAC单元去实现累加和乘法运算。-A fir filter which uses the MAC unit to achieve accumulation and multiplication.
FIR-filter-vhdl
- 工程：用VHDL语言实现的FIR滤波器设计。-FIR filter using vhdl using QuartusII
FIR-filter-using-fpga-design
- 基于FPGA的高阶FIR滤波器设计4有matlab设计步骤 4.3更详细 第六章量化系数实例-FIR using FPGA ，QuartusII software
FIR
- 实现FIR滤波，利用Verilog语言对其进行了设计 -FIR filter implementation using Verilog language design was carried out
fir
- 真正意思上的fir滤波器课程设计，基于quartus II9.0的vhdl代码。有原理图输入和例化元件-The real meaning of the fir filter design program, based on quartus II9.0 the vhdl code. A schematic of components and cases