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UART_VHDLsouce
- nexys 2 examples for improve study of vhdl digital design using diligent fpga board
try_ram
- Verilog Codes for RAM-Testing. Write data in the RAM and read it out from the RAM. Tested on NEXYS 3.
Timer
- Nexys 3 seven segment display module written in VHDL
NexysVideo-master
- XCD files and configuration for the nexys video board
VGA-controller
- VGA controller tested on Xilinx Spartan 6 FPGA on Nexys 3 board
TP_1
- THIS TP DESCRIBES HOW TO WORK WITH NEXYS 3
Lab5
- In this lab you will combine the techniques you learned in the previous labs and new ones to design an electric wheel of fortune on the Nexys-2 board. New coding techniques introduced in this lab are building vhdl modules using packages and procedure