generic vhdl code for basic descr iption is not big thing

Hierarchical Carry Save Algorithm. HCSA Generic ALU.

vhdl 实现三角波输出，分辨率可调，与比较器连用可以实现PWM输出-VHDL generic Triangle，ENTITY Triangle IS port( rst : in std_logic clk : in std_logic tri_data:out std_logic_vector(7 downto 0) ) end Triangle