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cccp
- des-soft.com/download/soft/3894.htm - 12k - 网页快照 - 类似网页 - 以Verilog 描述DES 加密算法(电子书)[ 繁体 ] ... CISCO 的fireware, router , SONY 的PS2 的都一再的证明了这个事实. 现在, 我们 就以著名的网络安全加密算法DES 为例子, 来看看如何用Verilog 来表达... ... Re: 以Verilog 描述DES 加密算法(电子书) 由Anonymous 发
crc_verilog
- HDLC控制协议中CRC校验码算法代码，为CRC16，Verilog语言
用verilog硬件描述语言编写的fft算法
- 用verilog硬件描述语言编写的fft算法，很是经典，和大家共享，希望能对大家有所帮助。,Verilog hardware descr iption language with the preparation of the fft algorithm, it is a classic, and we share the hope that it can be helpful to everyone.
tongbu
- 使用VERILOG开发时钟同步算法，能够从数据信号中提取时钟信息，-Clock synchronization algorithm using VERILOG developed to extract the clock from the data signal information,
RS(204.188)design
- RS(204,188)译码器说明 原文件： rs_decoder.v（顶层文件）, SyndromeCalc.v（计算伴随式）, BM_KES.v（BM求解关键方程）, Forney.v（Forney算法求误差样值）, CheinSearch.v（搜索错误位置）,ff_mul.v（有限域乘法）。 ROM及初始化文件： rom_inv.v（求逆运算）, rom_power.v（求幂运算）； rom_inv.mif（ROM初始化文件）, rom_po
3-22
- verilog 中RLS算法的实现功能 已经在仿真窗口的波形实现-verilog about rls algorithm
delay_early_gate
- 全数字超前—滞后门符号同步算法的FPGA实现的verilog源代码-digital lead-lag syn
MPEG4Codec
- Mpeg4图象编解码算法原程序，基于VC。-Mpeg4 decoding algorithm for the original process image, based on VC.
Tomasulo2
- 用verilog编写流水CPU。采用Tomasulo算法，进一步的减少了等式右边的各项暂停时间，并通过阅读文献，实现了一种基于此算法原理的机器PowerPC 620的CPU的雏形-Tomasulo Based Speculative Processor
sobel-with-verilog-language
- 用verilog实现sobel边缘检测算法-sobel edge detection with verilog language
LnE
- verilog写的LnE算法，可用于计算指数和对数(Verilog written in LnE algorithm, can be used to calculate the index and the logarithm)
control_s
- 数控机床 多轴插补原理积分算法，实现s曲线加减速原理(Numerical control machine tool multi axis interpolation principle, integration algorithm, to achieve the S curve acceleration and deceleration principle)
基于FPGA的高斯随机数发生器的设计与实现_徐新才
- 介绍了一种利用FPGA硬件平台生成高斯随机数的算法。(An algorithm for generating Gauss random numbers using FPGA hardware platform is introduced)
21ic下载_sm4算法_Verilog
- sm4加密算法fpga实现，采用verliog语言(SM4 encryption algorithm FPGA implementation, using verliog language)
wuhao
- C语言编程以及MIPS汇编语言还有logisim的简单实现，算法(C language programming and MIPS assembly language, as well as a simple implementation of logisim, algorithm)
SM3算法verilog实现
- SM3算法verilog实现,利用alter芯片开发的sm3算法实现(Implementation of SM3 algorithm Verilog and implementation of Sm3 algorithm developed by alter chip)
src
- 用verilog实现ldpc最小和译码算法(This code is for the decode of MS-algorithm based on LDPC.)
同步
- 基于FPGA的位同步算法的verilog实现(Verilog implementation of synchronization algorithm)
GCD
- 输入为两个32位数值，用辗转相减法实现的最大公约数算法进行输出，含有置位信号。(The input is two 32 bit values, and the algorithm of the greatest common divisor realized by the subtractive subtraction algorithm carries out the output, which contains the set signal.)
CORDIC 代码
- Xilinx CORDIC 算法 MATLAB Verilog仿真(arctan.m Kn.m sin_cos.m MATLAB Verilog)