CH372 USB芯片 采用Verilog语言，实现FPGA与上位机通信，按键触发FPGA向上位机传数，USB测试软件向FPGA传数-CH372 USB chip using Verilog language, to achieve FPGA and PC communications, key trigger FPGA pass up crew numbers, USB test software to pass several FPGA

USB slave: It is contain a USB slave design written in verilog language. It is a interface between USB host and Functions such as memory, Keyboard, mouse and so on.-SB slave: It is contain a USB slave design written in verilog language. It is a inter

关于USB开发的verilog开发程序，非常的全面，学习FPGA开发时用得着。-About USB development verilog development process, very comprehensive, learning FPGA development time worthwhile.

Verilog implementation of an SPI slave interface. Intially targetted for Atlys devkit (Xilinx Spartan-6) controlled by TotalPhase Cheetah USB/SPI adapter