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PcodeGeneration
- 在ModelSim或其他支持Verilog语言编译的环境中仿真可得GPS的P码及与卫星数据码调制后的波形，其中一个为源程序，另一个为测试程序-ModelSim or other support in the language Verilog simulation environment to compile available GPS P-code and code of satellite data after the modulation waveform, one for the sour
uartnew
- 好用的UART通信源码，使用Verilog 编写 在QUARTUS下完成，并用ModelSim仿真通过-Source-to-use UART communications, the use of Verilog in Quartus to complete the preparation and use of ModelSim simulation through
key_filter
- 用于FPGA的按键消抖的Verilog文件，经过modelsim仿真和下板验证。-Verilog file for FPGA key debounce, after modelsim simulation and verification under the plate.
BtoC
- 文件中有两种方法实现并串转换模块代码的编写，可以在modelsim软件中正确仿真(There are two methods in the file to achieve the serial conversion module code writing, can be correctly simulated in Modelsim software)
fpga_slavefifo2b_verilog
- fpga控制USB接口数据收发，包含verilog 仿真代码和调试工程(fpga control usb3.0, modelsim simulation, verilog language)