这是一个QPSK比较完整的FPGA工程，是用Verilog语言写的，主要包括调制解调模块。-This is a QPSK FPGA project is written in Verilog language, including the modem module.

In this case is a viterbi algorithm code for decoding the convolutional code, using verilog HDL language. This code provide the method of deconvolution of the convolutional code