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10100MIP
- 以太网10100M IP核Verilog源码(可综合)\以太网10-100M IP核Verilog源码，可综合-10100M IP Ethernet core Verilog source code (which can be integrated) \ 10-100M IP Ethernet core Verilog source code can be integrated
VHDLmipsPipeline
- 32 位MIP流水线CPU设计，5 stage，代码详细，包括ALU,存储器,寄存器等，是个很不错的CPU设计-32 MIP pipelined CPU design, 5 stage, the code in detail, including the ALU, memory, registers, etc. is a very good CPU design
kernel
- mip cpu 操作系统系统使用的内核模式切换和调用代码。汇编语言-mip cpu operating systems use a kernel-mode switch and the calling code. Assembler
linux_mips_norflash_low_lever_driver_and_the_struc
- spasion Winbond，intel ST，STM，EON等绝大部分主流厂家全系列 norflash底层驱动程序范例，在mip + linux架构下调试通过，已用于大规模量产，对采用flash的设备驱动有借鉴意义-spasion Winbond, intel ST, STM, EON and so most of the mainstream manufacturers a full range of low-level driver norflash examples of archit
MIPS-C
- 北京航空航天大学，计算机组成原理大作业，设计MIP-c处理器-Beijing University of Aeronautics and Astronautics, great work computer organization, design MIP-c processor