搜索资源列表
S3Demo
- 用FPGA模拟VGA时序、模拟PS/2总线的键盘接口VHDL源代码，基于Xilinx spartan3-VGA FPGA timing simulation, simulation PS / 2 keyboard interface bus VHDL source code, Based on Xilinx spartan3
seven_seg
- 一个verilog代码，该代码很适合初学者熟悉FPGA的开发流程，主要功能为实现七段代码管的显示，主要针对xilinx公司spartan3系列的FPGA-a verilog code that are very suitable for beginners FPGA familiar with the development process, main function of the realization of the code in paragraph 107, xilinx against
Frequence_Generator
- xilinx提供的频率发生器的VHDL源码，可以运行在spartan3的学习开发板上。-xilinx the frequency generator VHDL source code, spartan3 can run in the learning development board.
PS2Fpga
- PS2开发源代码，取自于FPGA开发板，可直接应用于实际项目中-PS2 development of source code, derived from FPGA development board can be directly applied to actual projects
opb_lcd_controller_v1_00_a
- spartan3系列fpga opb模式下lcd液晶屏控制代码-spartan3 Series fpga opb mode lcd LCD screen control code
H_480
- 在spartan3开发板上实现了VGA 图像现实，代码简单实用，是源码。-In spartan3 development board to achieve a VGA image reality, the code is simple and practical, is the source code.
Ultra-9-17
- 超声波流量计采样控制部分的VHDL源代码，基于xilinx的spartan3-The ultrasonic flowmeter sampling control part of the VHDL source code, based on xilinx s spartan3
KCPSM6_Release5_30Sept12(Virtex6)
- XIlinx Virtex-6 （Spartan6及7系列）的PicoBlaze的源代码（官网转载），与用于Virtex2、Spartan3的不一样！-Xilinx Virtex-6 (Spartan6-and 7 series), the PicoBlaze the source code (the official website reproduced) with for Virtex2, the Spartan3' s not!