搜索资源列表
numerical-tour.zip
- 信号处理系列导航，如：用短时傅里叶变换进行声音处理,Signal processing series of navigation, such as: use of short-time Fourier transform for audio processing
spsnip_gui
- This a GUI that manages DSP analysis functions for wav-files (e.g., speech signals). Two functions (plotps.m and spect.m) are included for starters. You may write your own functions and integrate that into the GUI without much hassle (see instruction
Real-Time-Digital-Signal-Processing
- 很好的TI TMS320C55X系列处理器应用文档，讲解了其硬件结构和几个应用实例。-TI TMS320C55X good series processor application documents, on its hardware structure and a few application examples.
LPC2103MOTOR
- LPC2103两轴步进电机控制程序,带加减速,一路脉冲+方向输出、继电器延时、报警,三菱FX系列通信兼容RS232(9600,1,0.1)-LPC2103 two-axis stepper motor control program, with acceleration and deceleration, all the way pulse+ direction output, time delay relays, alarm, Mitsubishi FX series communicati
DCHUFAQI
- 一个典型的时序元件D触发器的VHDL描述,希望对大家有帮助-A typical time-series components of the VHDL descr iption of D flip-flop
DSP
- 用C语言编程产生一些时间序列信号，时间序列信号之间再做运算-C language programming with some time series signals, time series between the signal operator again
multiplier
- 该乘法器是由8位加法器构成的以时序方式设计的8位乘法器。 其乘法原理是：乘法通过逐项移位相加原理来实现，从被乘数的最低位开始，若为1，则乘数左移后与上一次的和相加；若为0，左移后以全零相加，直至被乘数的最高位。-The multiplier is 8-bit adder consisting of time-series design to the 8-bit multiplier. The multiplication principle is: the sum of multiplica
frst_loc
- C语言环境下,TV所必须的各种分辨率!增加和删除每一个时序,一眼了然!对应的详细数据十分完美!-C language environment, TV must be a variety of resolution! Increase, and delete each time series, a very clear! Corresponding detailed data is perfect!
time
- 用单片机模拟的I2C通讯（学习）这个程序参考，用C8051F系列的单片机可以直接和PCF8563进行通讯-Single-chip simulation with I2C communication (learning) refer to this procedure, the C8051F series of single-chip can communicate directly and PCF8563
61A-6800
- 凌阳单片机模拟6800时序，很多液晶的驱动可以用的上。-Sunplus simulated 6800 time series, a lot of LCD driver can be used on.
zijian
- 单片机的自检实验的程序，我花了很久编的呢-SCM self-test trials, I spent a long time series it
fpga
- 这是我的fpga分析时序心得，比较详细，欢迎下载-This is my fpga analysis of time series ideas and more details, please download
veriloghdl
- Verilog HDL是一种硬件描述语言，用于从算法级、门级到开关级的多种抽象设计层次的 数字系统建模。被建模的数字系统对象的复杂性可以介于简单的门和完整的电子数字系统之间。数字系统能够按层次描述，并可在相同描述中显式地进行时序建模。-Verilog HDL is a hardware descr iption language, used from the algorithm level, gate-level to switch level design of a variety of
reset80C51
- 80C51上电复位和复位延时的时序分析 REST ALE-The electricity and reset 80C51 reset the time delay of time-series analysis The REST ALE
FFT2
- ADI公司DSP中BF561系列的时间抽取基2FFT的定点DSPs实现-ADI BF561 DSP, the company extracted the time series of fixed-point DSPs to achieve the base 2FFT
RS232_FIR
- Quartus II was a development tool of CPLD / FPGA by Altera Company. Quartus II provides a fully integrated circuit structure and has nothing with the development package environment, it has all the features of digital logic design, it is including: a
LCD-display
- 1602液晶的显示驱动，学习单片机的时候编的，经验浅，莫笑-1602 LCD display driver, the time series of single chip learning, experience shallow, MO laughs
analysis
- 很经典的华为时序分析资料，用于电路的时序分析-Huawei is the classic time series analysis data for circuit timing analysis
DS1302-time
- STC51单片机系列的DS1302实时时钟代码-STC51 real-time clock DS1302 series microcontroller code
time
- 系统的设计电路是以 AT89S52 单片机为核心控制器，其外围电路主要包括时钟模块、 键盘模块、液晶显示模块和跑表。这种电子钟不仅具有了一般电子钟的基本功能，并且具有以下功能：闹钟时间设置，显示年月日，跑表,对重要日子倒计时,温度监测等一系列功能。-System design is based on AT89S52 microcontroller core circuit controller, the peripheral circuit includes a clock module, ke