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译码器
- 通过对用硬件描述语言VHDL表示的某个专用部件（如中断控制器、差错控制码编码/译码器，此为译码器）的代码分析，构建它的逻辑结构，加深对相关部件设计技术的理解。 试验平台：MaxPlusII -through the use of VHDL hardware descr iption language said a special components (such as interrupt controllers, error control coding / decoding devic
hammingencoding
- 1.汉明编码的硬件实现vhdl语言 2.测试用，简单明晰 3.内含有另一份c代码的汉明码纠错编码源代码-1. Hamming codes hardware vhdl two languages. Test, 3 simple clarity. Another containing a code c Hamming code error correction coding source code
hamming_encodeadecode
- 用Verilog语言编写的对m序列进行汉明码编译码的程序。具体实现为产生m序列后对其进行(7,4)汉明码编码并加错，然后将其纠错译码并输出，详细过程见仿真。-Written by Verilog m sequence of procedures for coding and decoding Hamming codes. Concrete realization of m sequence to produce its (7,4) hamming code and a mistake, and
rs-codec(255-223)
- RS编码是一种纠错码，本程序实现RS（255，223）用FPGA 实现RS编码，程序在Quartus II中调试通过。-RS coding is an error-correcting codes, the procedures for the realization of RS (255,223) with FPGA realization of RS codes, in the Quartus II program through the debugger.
TELECOM2
- This file contains program files associated with the paper titled "US Digital Cellular Error-Correction Coding Algorithm Implementation on the TMS320C5x", Telecom Applications With The TMS320C5x DSPs, Application Book, 1994, SPRA033. This file c
bloc_code
- Simple bloc coding algorithm which can detect and correct single error.-Simple bloc coding algorithm which can detect and correct single error.
gen_ecc
- ecc generator Error Correction Coding -ecc generator Error Correction Coding
jcbm12yn
- 通信原理纠错编码及其应用的软硬件实现 有具体的实验报告和代码-error correction of coding
ViterbiFPGA
- 探讨了CDMA 数字移动通信中的差错控制问题, 研究用约束度K = 9 的卷积编码 和最大似然V iterbi 译码的差错控制方案. 在V iterbi 译码算法中, 提出了原位运算度量、保 存路径转移过程和循环存取幸存路径等方法, 能有效地减少存储量、降低功耗, 使得K = 9 的V iterbi 译码算法可在以单片XC4010 FPGA 为主的器件上实现, 其性能指标符合CD2 MA 数字移动通信IS 95 标准要求. 文中给出了实测的算法性能, 讨论了FPGA 具体实现
UHF-RFID-CRC
- 本文首先研究了IsO／IECl8000．6标准中A、B两类短程通讯的前向链路与返回 链路的数据编码方式，对(FMO)双相间隔编码、(PIE)脉冲间隔编码、曼切斯特码 的编解码方式和技术参数进行了深入的分析，并利用FPGA实验平台对这三种编 码的编、解码电路进行了设计和仿真。然后对UHF RFID系统的差错控制技术原理 进行了探讨，重点研究了ISo／IECl8000．6标准中采用的数据保护与校验技术，即 循环冗余校验(CRC)技术。分析了基于线性反馈移位寄存器(LFSR)实现C
33162769crcm
- 基于FPGA的差错控制编码，CRC循环校验码的VHDL程序代码，含仿真文件-FPGA-based error control coding, CRC cyclic check code VHDL code, including simulation file
FPGA-convolutions-encoder
- 卷积码是数字通信中很重要的一种差错控制编码 具有很好的性能,用硬件的形式描述具有速度快，便于修改的优点，通过该种方法设，计的编码器经测试运行可靠正确。-Convolutional codes are very important in digital communication error control coding with a good performance, with the descr iption of the hardware in the form of a fast, eas
bch-coding
- In this project, we are implementing the error detection and correction using BCH code (Bose Chaudhuri Hocquenghem). Using VHDL and targeted on FPGA for synthesis of the code. The encoder and decoder combine called as a codec.
BCH
- BCH 是纠错能力可控的纠错编码，是循环码的子类． 介绍了BCH 码的编码原理和设计方法，在特定信道和调制方式下对经过BCH 编码的系统进行仿真，分析BCH 码在特定信道下的编码增益.-BCH is error correction ability of controllable error correction coding, is a subclass of cyclic code. Introduces BCH code coding principle and design method
RS
- 几乎所有的现代化通信系统都把纠错编码作为一个基本组成部分。RS码由于 具有强有力的纠错功能，已经被NASA、ESA、CCSDS等空间组织接受，用于空间信道纠错。 本文简单论述了RS编码原理，纠错算法及工作流程，能使大家初步了解RS编码-Almost all modern communication systems regard the error correction coding as a basic component. RS code due to Powerful error
error-free
- i want verilogHDL and VHDL source coding.please help me-i want verilogHDL and VHDL source coding.please help me.......
RRS__encodderS
- RS码的编码程序源码编码效率高，且经实实际验证符合RS纠错码的要求 可直接使用。 -RS code encoding program source coding efficiency is high, and the actual verification by the real comply with the requirements of the RS error correction code can be used directly.
Embedded-C-Coding-Standard
- 一本介绍嵌入式C编码规范的书，由Michael Barr编写。这本书致力于减少嵌入式程序中的各种错误，并使代码易读，易维护。-An introduction to embedded C coding standard book, written by Michael Barr. This book is committed to reducing the error of the embedded program, and make the code easy to read, easy to
adaptive_lms_equalizer_latest.tar
- least mean square algorithm for error correction coding technique
Rs-code-DSP
- RS纠错编码DSP实现，无线通信常用纠错编码RS纠错编码c语言实现-RS error correction coding DSP implementation