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uart vhdl代码
- 基于fpga的异步串口通信
uart.使用fpga的FIFO，状态机
- 使用fpga的FIFO，状态机，乒乓操作等实现了异步uart。,The use of fpga-FIFO, state machine, ping-pong operation to achieve the asynchronous uart.
uart8.zip
- 使用Libero提供的异步通信IP核实现uart通信，并附带仿真程序。uart设置为1位开始位，8位数据位，1位停止位，无校验。且uart发送自带2级FIFO缓冲，占用fpga面积很小。,Libero provided the use of asynchronous communication IP core implementation uart communications, and incidental simulation program. uart is set to 1 to sta
uart
- 利用fpga接受232芯片的串口数据，可以与PC进行串口通信-fpga chip using the serial data received 232, serial communication with PC
uart
- 语言：verilog语言 功能：通过串口控制模块，实现fpga与串口 通信。 仿真环境：modelsim 综合环境：quartus -Language: verilog language function: through the serial port control module, fpga and serial communication. Simulation Environment: modelsim integrated environment: quartu
uart
- 基于fpga的uart实现 用vhdl编程-The uart-based fpga using vhdl Programming
uart
- fpga的串口模块，实现fpga与PC机的串口通讯。-fpga serial modules, fpga implementation with the PC-Serial communication.
uart
- uart通信协议的硬件描述语言代码，用与fpga的总线接口开发-uart communication protocol of the hardware descr iption language code, using the bus interface with the fpga development
uart_ise_vhdl
- fpga里实现 uart 经典 vhdl语言写的 ise工程文件-fpga implementation in vhdl language classic uart of ise project file
uart(fpga)
- 基于现场可编程逻辑器件（fpga）使用vhdl语言QuartusII实现uart通讯-Based on field programmable logic device (fpga) using vhdl language QuartusII achieve uart communications
uart
- 基于fpga的多调制uart的设计，相当不错，可估参考-fpga-based multi-modem uart design, very good reference to assess
uart
- uart-universal aynchronious reciever and transmitter used to connect the pc and fpga to pass the data
fpga
- fpga数字电子系统设计与开发 ISE I2C uart usb vga -ISE I2C uart usb vga
uart
- uart接口读写控制器，已经在fpga上测试通过-uart interface to read and write controller, has been tested by fpga
uart
- 用fpga开发的串口通信的程序，代码是用verilog编写的，希望对大家有用！-Serial communication with the fpga development process, the code is written in verilog and hope for all of us!
uart
- fpga中的uart模块，调试通过的哦！！希望对大家有所帮助，呵呵。。。我用的是quartus7.2版本编写的，当然也有些copy网上的-fpga in the uart modules, debugging through the Oh! ! We want to help, Hehe. . . I use the quartus7.2 version of the written, of course, also some copy online
uart
- fpga基于串口指令的多电机闭环调速系统-fpga based multi-port instruction Motor Closed Loop System
fpga-uart
- 该资料是实现vhdl的串口通信(uart)，RS232接口协议，-vhdl implementation of serial communication
uart
- xilinx官网提供的vhdl,uart串行通信模块，肯定好用，官方提供-xilinx official website provides vhdl, uart, fpga communication module is certainly easy to use, official
fpga_uart
- 用Verilog语言实现的fpga uart独立收发模块 思路简单，代码简洁。在Lattice LFE3EA VERSA开发板上验证通过,编译器Lattice Diamond. 功能：串口收到数据后立即回传，此后每一秒串口数据+1再发送。-Using Verilog language independent of fpga uart transceiver idea is simple, concise code. Development board in Lattice LFE3EA