搜索资源列表
OR
- VHDL code for OR gate
CRC-Generator-for-Verilog-or-VHDL
- CRC Generator for Verilog or VHDL-CRC Generator for Verilog or VHDL
The-Inefficiency-of-CPP--Fact-or-Fiction
- Efficiency of c and c++ : fact or fiction
or
- or gate implementation in vhdl.
rise-or-fall-detect
- 上升沿、下降沿检测代码,开发语言是verilog HDL，希望对大家有所帮助-rise or fall detect of information and the tool is the software Quartus and the landuage is vrilog HDLthank you for using it hope it will benifit for you
verilog-or-to-led
- 利用verilog语言实现或门实现LED的显示，非常适合初学者来学习这个硬件语言。-Using verilog language or door to achieve the LED display, ideal for beginners to learn the hardware language.
Example-or-ADC-for-AT91SAM7S64
- ARM7（AT91SAM7S64）的ADC变换实例程序-Example Program or ADC for AT91SAM7S64.zip
Send-numeric-or-character
- 单片机通过串行口向pc机发送数字或字符，查询法。-Microcontroller through the serial port to the pc machine to send a number or character, the query method.
or
- this the vhdl code for or gate with rtl view and simulations-this is the vhdl code for or gate with rtl view and simulations
test--and-gate-or-gate-not-gate
- 检测与门、或门、非门等门电路芯片是否正常的程序-Whether the normal procedure of detect AND gate, OR gate, NAND gates gate circuit chip
Quadruple-2-Input-Exclusive-Or-Gates
- quadruple dual input exclusive or gates
qt-zip-or-unzip
- qt 压缩解压缩文件和文件夹源码，嵌入式应用资源一般都比较紧张，有需要的参考下。-qt zip or unzip a file/a folder,qt code.a project.
delay-in-LEDs-on-or-off
- 入门延时的运用，助于初学者对延时的认识。-delay s apply in led s on or off.
Read-or-Write-data-at-AT24C64
- AT24C64的读写操作文件，该程序简洁，快速，执行效率高！-Read data from AT24C64, or Write Byte to At24c64.
STM32F103NorFlash-Or-SRM-CodeExecute
- KEIL开发STM32F103程序，在片外NorFlash或者是SRAM中运行。 STM32F103有三种启动方式，但是都无法直接在NorFlash或者片外SRAM启动，因此需要BootLoader，然后再执行跳转。 附件里有三个文件夹，一个是BOOT，一个是NorFlash应用程序，一个是SRAM应用程序，都是采用KEIL3.8编译。 本次选用BootLoader放在片内Flash，启动后配置FSMC_SRAM、以及FSMC_NOR，然后执行跳转到片外运行。 -KEIL
Palindromic-or-not
- A Program to check enterd number is palindromic or not
Motor-speed-with-magnet-or-Hall
- 电机测速(有霍尔+磁钢或红外反射对管+黑白码盘做该实验)-Motor speed (with magnet or Hall+ tube+ black and white infrared reflective code wheel to do the experiment)
UART-VHDL-Example-Code-for-an-FPGA-or-ASIC-from-n
- UART code using VHDL for FPGA or ASIC
Add-or-remove-spaces
- 对一段字符串实现添加空格或去除空格，以方便对其进行解析-To facilitate parse a string to add a space or removing spaces,
jishu-or-oushu
- 通过用户的输入判断该数是奇数还是偶数，在vs中运行即可。-Input by the user to determine whether the number is odd or even, and can be run in vs.