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at89s52_cCS5460_power_meter.ra
- 基于CS5460A和AT89S52的单相电功率测量仪的设计，并用ZLG7289实现数码管的驱动。资料为单相电功率测量仪源代码。,CS5460A and AT89S52-based single-phase electric power meter design, and implementation of digital control ZLG7289 driver. Information for the single-phase electric power measuring instru
source-code-of-brushless-motor
- 无刷电机驱动器源代码。基于无传感器方案的无刷电机启动器。核心是换向角度检测：即电机反电势波形数据处理，经过衰减滤波，取出过零相位。应为低速反电势波形dB过小，波形扰动太大，本程序还不能稳定处理10Hz以下的换向计算。,Brushless motor driver source code. Program based on the sensorless brushless motor starter. Is the core to the point of view for detection:
This VHDL code pertains to the DCO model
- code.doc C.1 DCO LEVEL 2 This VHDL code pertains to the DCO model descr iption in Section 6.5.5. The entity declaration of the level 2 DCO is between lines 18 and 39. The VHDL generics or elaboration-phase parameter constants are declared between
dpll
- dpll的verilog代码，完成数字锁相。用于时钟对准，位同步。-dpll the verilog code to complete the digital phase-locked. Alignment for the clock, bit synchronization.
sxdn
- 三相电能表源程序 三相电能表源程序-Three-phase Energy Meter Three Phase Energy Meter source source
MC145152
- 1、数字锁相环的单片机代码。 2、单片机与数字锁相环MC145152的应用系统的设计与实现。-1, the single-chip digital phase-locked loop code. 2, microcontroller and digital PLL MC145152 Application System Design and Implementation.
code-PDF
- 驱动程序设计 国嵌第5阶段(驱动程序设计)-Country embedded driver design phase 5 (Driver)
VHDL
- 8位相等比较器含源代码，用VHDL语言编写，具体很高的实用性，供读者参考-8, phase comparator, such as with the source code, using VHDL language, the specific relevance of a high for the reader is referred to
DDR_SDRAM_controller
- DDR SDRAM控制器的VHDL源代码，含详细设计文档。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock Manager (DCM) provides t
frequency_measured_amplitude_phase_measurement
- 2008年北京市大学生电子设计竞赛程序源代码[测频率，测幅值，测相位]。进过竞赛测试性能良好，获奖作品-Beijing 2008 Undergraduate Electronic Design Contest source code [test frequency, measured amplitude, phase measurement]. Progressive had a good race to test the performance, winning entries
ADE7758threephase
- This the Firmware code for the ADE7758 for the PIC Micro controller for the computation of three phase parameters.-This the Firmware code for the ADE7758 for the PIC Micro controller for the computation of three phase parameters.
svc_timer33ms
- Verilog 下脉冲发生器的源代码，可用于模拟三相交流电过零点，主要用于调试一些类似SVC（无功补偿）控制器的一些算法-Pulse generator under the Verilog source code, can be used to simulate three-phase alternating current zero-crossing point, mainly for debugging similar SVC (reactive power compensation) co
PLL
- PLL是数字锁相环设计源程序, 其中, Fi是输入频率(接收数据), Fo(Q5)是本地输出频率. 目的是从输入数据中提取时钟信号(Q5), 其频率与数据速率一致, 时钟上升沿锁定在数据的上升和下降沿上； 顶层文件是PLL.GDF-Digital phase-locked loop PLL is the design source code, which, Fi is the input frequency (receive data), Fo (Q5) is
XSADC
- 适用软件：Code Warrior 4.7 Target : MC9S12XS128单片机 Crystal: 16.000Mhz busclock: 8.000MHz pllclock:16.000MHz 本程序主要包括以下功能： 1.设置锁相环和总线频率； 2.IO口使用； 3.共四路ATD使用及显示方法。 LED计数，根据灯亮可以读取系统循环了多少次-Code Warrior 4.7 Target: MC9S12XS128 Crystal: 16.0
XSIOC
- Code Warrior 4.7 Target : MC9S12XS128 Crystal: 16.000Mhz busclock:16.000MHz pllclock:32.000MHz ============================================ 本程序主要包括以下功能： 1.设置锁相环和总线频率； 2.IO口使用； 3.IOC7口16位计数器。 LED计数，根据灯亮可以读取系统循环了多少次-Code Warrior
ADE7758_communication_test
- This source code writes to ADE7758 3-phase energy meter registers and reads them, showing information in a 16x2 LCD. This is done to check SPI communication.
PN_code_capture_and_tracing
- 一个完整的pn码捕获与跟踪的VHDL源码,并行匹配滤波器捕获,锁相环跟踪.-A complete pn Code Acquisition and Tracking of the VHDL source code, parallel matched filter to capture, phase-locked loop tracking.
StaticPLL
- 介绍FPGA中数字锁相环的设计方法和应用的文档-Introduction of Digital Phase-Locked Loop FPGA design methodology and application documents
3-phase-spwm
- dsPIC30f2010三项逆变C程序源码，通过KIT3编程器测试。-dsPIC30f2010 three inverter C program source code, programmer by KIT3 test.
Micro inverter Source Code
- 微逆源码， 单相逆变器，逆变器 ，C语言(Micro inverter source, single-phase inverter, inverter, C language)