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verilogzzhwfy
- 用Verilog实现QPSK中的差分,扰码,串并,解差分,解扰码,解串并,用MUXPLUS2进行仿真-QPSK with Verilog realize the difference, code, and serial, Xie difference, encryption codes, and solutions Series, The simulation used MUXPLUS2
PLL
- 可以实现自动锁相环功能的C源程序代码模块，-Can be achieved automatically PLL function C source code modules,
verilog
- 经典Verilog源代码，包括加法器，滤波器和qpsk的设计-Classic Verilog source code, including adders, filters and qpsk design, etc. ...
hardware-qpskmodulate1
- 采用硬件描述语言verilog进行QPSK变换的实现的代码- Using hardware descr iption languages Verilog implementation of QPSK converter code
modulation-and-demodulation
- 调制与解调系统的FPGA设计实现,包括2-ASK调制和解调,2-FSK调制和解调,2-PSK调制和解调,QPSK调制和解调,PPM调制和解调的verilog源代码。-FPGA design implementation of modulation and demodulation system, including 2-ASK modulation and demodulation, 2-FSK modulation and demodulation, 2-PSK modulation and
AD9910
- 基于AD9910的Verilog程序，实现QPSK调制，只要再加少量代码就可实现8PSK调制-Based on Verilog AD9910 procedure, realization of QPSK modulation, just add a small amount of code can achieve 8PSK modulation
QPSK
- 这是用ISE编写的verilog语言的QPSK调制的代码-This is the QPSK modulation verilog language written with ISE code
QPSK_v
- 1-bit QPSK code for verilog.