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ref-sdr-sdram-verilog
- 本代码是用VRILOG语言写的SDRAM的控制器的标准代码,供开发SARM参考.-this code is used to write the language VRILOG SDRAM controller standard code for the development of SARM reference.
sha-1.rar
- 本算法基于leon2协处理器接口标准，内含testbench，在modelsim中仿真通过，在ise9.2中综合及后仿真通过。,The algorithm is based on the leon2 co-processor interface standard, including testbench, ModelSim simulation in the adoption, in ise9.2 integrated and adopted after the simulation.
ISA.rar
- pc104代码，这是本人调通过的。标准ISA通信接口，用VHDL编写,pc104 code, This is my tune adopted. ISA standard communication interface, using VHDL prepared
标准的串口通讯设计VHDL
- 标准的异步串口通讯设计程序——基于VHDL编程-communication design programme of standard asynchronous serial port base on VHDL programme
VGA
- 压缩包中包含了用Verilog编写的视频控制模块，实现PAL制式到VGA制式的实时转换，同时包含了VGA专用ram配置模块，可直接实用-Compressed package includes the preparation of the video with the Verilog control module, PAL format to achieve real-time conversion to standard VGA, VGA also includes dedicated ram
a_vhdl_8253_timer_latest.tar
- 一个apb总线控制8253的verilog源代码，符合标准的amba 2.0的总线规范-A apb bus control 8253 of the verilog source code, amba 2.0 standard bus specification
IEEEStd1364_2001
- verilog 1364——2001 语言标准-Verilog Hardware Descr iption Language standard
i2c
- 标准I2c读写时序，verilog Hdl-Standard I2c read and write timing, verilog Hdl
ref-sdr-sdram-verilog
- 标准SRD SDRAM控制器参考设计，altera提供 Verilog代码,带有使用手册，大家试试交流一下 -Standard SRD SDRAM controller reference design, altera provide Verilog code, with user manual, we try to exchange some
ahbapb
- AMBA2.0标准的AHB2APb桥，代码通过验证-AMBA2.0 standard AHB2APb Bridge, through the verification code
uart_verilog
- 用verilog编写的标准异步串行通行程序，供大家参考！-Prepared using Verilog standard asynchronous serial passage procedures for your reference!
iic
- 一个verilog源代码，可用ISE等实现，功能为I2C接口标准建模。-A verilog source code, can be used, such as the realization of ISE, the functional model for the I2C interface standard.
hello_flash
- hello_flash是ALTERA的NIOSII核的标准程序。读写FPGA外带的Flash。-ALTERA the hello_flash is standard procedure for nuclear NIOSII. Hit-and-run of the FPGA to read and write Flash.
des_Vhdl
- VHDL & Verilog Synthesizable model of the Data Encryption Standard (DES)
DES
- This is verilog source code for DES(Data Encryption standard) which is used in network security.
fpu100_latest.tar
- 这是一个32位的浮点运算单元（FPU），它可以根据IEEE754标准被完全编译。此FPU已被硬件测试和被软件仿真通过。-This is a 32-bit floating point unit (FPU),It can do arithmetic operations on floating point numbers. The FPU complies fully with the IEEE 754 Standard. The FPU was tested and simulated in h
IEEE.Standard.Verilog.Hardware.Description.Languag
- IEEE Standard Verilog Hardware Descr iption Language-IEEE Standard Verilog Hardware Descr iption Language(
fir10order-verilog
- 1M_200k_低通fir10阶verilog标准代码-1M_200k_ order lowpass fir 10 verilog standard tags
IEEE Standard for Verilog 2005
- IEEE Standard for Verilog 2005
IEEE Standard for Verilog 2005
- this book introduces the use of Verilog HDL.