搜索资源列表
FIFO_counters_VHDL.rar
- FIFO和计数器以及时钟控制,用于程控交换机教学,与DSP和ADDA芯片配合完成程控交换机功能,FIFO and counters and clock control, program-controlled switchboard for teaching, with the DSP and complete ADDA chip with program-controlled switchboard function
netfpga_full_3_0_0.tar
- 斯坦福大学的netfpga最新源代码开发包,用于开发网络路由器交换机等-Stanford University netfpga the latest source code development kit for developing network switches routers
XillinxFor_CKJH
- 程控交换机芯片用的VHDL语言程序, 与DSP配合完成程控交换机功能-VHDL code for tele-communication switcher in education
ADDA_control_VHDL
- VHDL语言的ADDA(模数数模置换)控制,用于程控交换机功能,与DSP和ADDA芯片配合-VHDL language ADDA (analog-to-digital digital-analog replacement) control, for program-controlled switchboard function, with the DSP and ADDA chip with
debounce_exchange_VHDL
- 时钟分配和分路传输功能的VHDL语言程序,用于程控交换机功能时钟分配和分路传输功能-Clock distribution and transmission functions of shunt procedures VHDL language for program-controlled switchboard function clock distribution and transmission functions of shunt
Ring_mem_VHDL
- 响铃和内存管理功能的VHDL语言,用于程控交换机中的Xillinx芯片与DSP和ADDA等芯片配合实现交换机的功能-Ringing and memory management features VHDL language, for program-controlled switchboards in Xillinx and ADDA chip and DSP chip, etc. with the function of switches realize
myprojects
- 同步数字复接的设计及其FPGA实现 在简要介绍同步数字复接基本原理的基础上,采用VHDL语言对同步数字复接各组成模块进行了设计,并在ISE集成环境下进行了设计描述、综合、布局布线及时序仿真,取得了正确的设计结果,同时利用中小容量的FPGA实现了同步数字复接功能。 基群速率数字信号的合成设备和分接设备是电信网络中使用较多的关键设备,在数字程控交换机的用户模块、小灵通基站控制器和集团电话中都需要使用这种同步数字复接设备。近年来,随着需要自建内部通信系统的公司和企业不断增多,同步数字复接设
VHDL
- 基于hdl的交换机设计,学习的人可以看一下-Hdl-based switch design, the study of people can look at
2uart
- 实现数据在两个串口之间的转发功能,很快速,相当于交换机。-Between the two serial data forwarding, very fast, the equivalent switch.
switch
- NETFPGA方面关于参考路由和参考交换机方面的代码,详细的描述了交换机实现的过程。-NETFPGA reference route and reference switches in the code, a detailed descr iption of the implementation process of the switch.
wishbone
- wishbone接口的设计,在交换机和MAC之间建立wishbone接口-the wishbone interface design, wishbone interface between the switch and MAC
88091
- 马威尔网卡驱动 交换机驱动 实现8路100M网*换 实现包自动转发 -Marvell LAN Driver 8-way switch drive to achieve 100M Ethernet port switching implementation packages automatically forwarded
switch_9
- 使用systemverilog语言写的4端*换机,你可以学习使用systemverilog-use systemverilog write 4 port switch,you can learing systemverilog language
ovm_switch_8
- 使用OVM验证了一个4端口的交换机,其中包括主要的组件,可以学习一下-use ovm language verification switch of 4 port,it include main ovm_component,so you can learning
switch_fabric
- verilog 写的具有代数交换功能的数据交换,是交换机设计的核心部分。-Switches Core by Applying Algebraic Switching