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vhdl_sw_lr
- 我自己写的vhdl程序，内有画图器，ram 和控制ram。还有test bentch。-I wrote it myself vhdl procedures, which are drawing device, and control of ram ram. There bentch test.
f_adder8
- fpga八位全加器(vhdl语言),由画图法制作,将八个一位全加器(由一位半加器组成)组合制成-fpga eight full adder (vhdl language)
LCD320240driver
- 320240lcd屏驱动程序，包括画图程序-320240lcd screen drivers, including the Paint program
code
- 5分频器的源代码编写过程中建议大家先画图，在用代码描写，清楚明了-5divider code， and easy to understand,you will find it is easy to write
DE2_LTM_TEST
- DE2开发板的TRDB-LTM测试程序，完成基本的画图功能-DE2 board TRDB- LTM test program to complete the basic drawing functions
plot_f1
- 此程序的功能是对Quartus II软件仿真完成之后，导出的.tbl文件进行matlab画图，画出其时域图和频域图。其中待处理的.tbl文件，我将其进行人工处理，手动删除了无用信息，只剩余时间点、输入信号和输出信号。-The function of this program after the completion of the Quartus II software simulation, export tbl file matlab drawing, draw a diagram of th
DE2_NIOS_HOST_MOUSE_VGA
- 用Vrilog实现了在显示器上用鼠标画图，开发环境是DE2-70-DE2-70 development environment to achieve a draw with the mouse on the display with the Vrilog