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gongcehngsheji_477-2
- 使用该VHDL在仿真软件中实现RSC(递归系统卷积)码的编码以及解码硬件仿真-use of the VHDL simulation software in achieving RSC (recursive convolution system) code encoding and decoding hardware simulation
juanjiqi
- 这是一个卷积器的设计，源码值得好好地学习-This is a convolution design, source code should be a good learning
juanji
- 采用vhdl语言编写的卷积编码（2.1.7），通过调试可直接下载使用-Convolution using vhdl language code (2.1.7) can be directly downloaded through the use of debugging
VD-vhdl-Code
- this codes are for convolution encoder and Viterbi decoder synthesis and implementation.
convolution
- convolution卷积码生成器程序设计及仿真源代码-convolution convolutional code generator source code of program design and simulation
f
- 为了解决传统的维特比译码器结构复杂、译码速度慢、消耗资源大的问题，提出一种新型的适用于FPGA特点，路径存储与译码输出并行工作，同步存储路径矢量和状态矢量的译码器设计方案。该设计方案通过仿真验证，译码结果正确，得到编码前的原始码元，速度显著提高，译码器复杂程度明显降低,性能优良。-The convolution code
convcode
- 基于Modelsim的卷积码(2,1,7)的Verilog实现，采用直接生成-Modelsim-based convolution code (2,1,7) and Verilog implementation of direct generation
viterbi
- 维特比译码，卷积编码，verilog编写，2,1,2编码-Victor than decoding, convolution code, verilog write, 2,1,2 coding
convol_enc
- VHDL code for convolution encoder for wimax PHY layer. This design also has control to add controlled amount of noise in encoded output.
Convolution-report
- 卷积码编解码器实现报告 包括 目的 要求 内容 代码 总结等-Convolutional encoding and decoding the report, including the purpose of the request content code summary
convotion_decode
- 用verilog写的卷积码的编码程序以及viterbi译码程序-Use verilog write convolution code coding procedures and viterbi decoding program
vhcg_latest.tar
- Viterbi algorithm is the most likelihood decode algorithm of convolution code. Viterbi decoder means the VLSI implementation of Viterbi algorithm. In the area of communication, convolution code is very popular, so how to improve the performance a
JJ213_program
- 卷积码（213）的编译码，VHDL语言编写的整个工程文件，带有仿真结果图。-Convolution code (213) codec, VHDL language of the whole project file with the simulation results shown in Fig.
juanjima
- 关于MATLAB语言的卷积码的编码与维特比译码-About convolution coding MATLAB language code and Viterbi decoding
OFDM_Convolution
- 自己写的卷积码，能实现仿真结果,有testbench文件-Write your own convolution code, simulation results can be achieved
conv313
- 卷积码编译码（3，1，3）的编码verilogHDL程序-Convolution code codec (3,1,3) coding verilog HDL program
convolution
- This the code for the convolutional and the test bench for this in the verilog code.-This is the code for the convolutional and the test bench for this in the verilog code.
convolution
- Source code for convolution of two complex number is written in Verilog language
卷积码程序verilog
- 用Verilog语言在FPGA下实现卷积程序。(Convolution code utilite by verilog)