搜索资源列表
riscdesign
- 一个非常简单的cpu设计的原代码,是用verilog编写的-a very simple cpu design of the original code, was prepared by the Verilog
jpeg_encoder
- 完整的jpeg encoder verilog code,DCT部分採用1991 IEEE transection paper,利用skew circular convolution來實現精簡電路-complete jpeg encoder Verilog code, DCT is partly based on the IEEE 1991 transection paper, using skew circular convolutions to achieve streamlining ci
jpeg压缩中的DCT蝶型算法verilog代码
- jpeg压缩中的DCT蝶型算法verilog代码-jpeg DCT compression algorithm verilog code BUTTERFLY
BCD2BIN8.rar
- BCD转BIN算法，BCD码转二进制数据。,BCD to BIN algorithm, BCD code to binary data.
fft
- fft代码,采用蝶形算法,包括C,matlab和verilog代码-fft code, using butterfly algorithm, including C, matlab and Verilog code
dft
- verilog语言实在点变换DFT源代码，可以配合软核或者其他CPU进行综合FFT变换，也可以单独使用生成module！-verilog language is point FFT transform source code, can tie in with the soft-core CPU, or other integrated FFT transform, it can be used to generate module!
RFC_1622_CRC16_m
- RFC1662 CRC-16 table generation and CRC checking. Implemented in embedded matlab with scr ipt to test and enable c/c++ code generation. Useful fo check against VHDL/Verilog and other embedded systems to help generate test vectors.
hdl
- 对lvds的结构用verilog和vhdl代码进行了详细的描述-The structure of the lvds with verilog and vhdl code described in detail
fir_filter_verilog
- FIR filter verilog project
LIP6492CORE_zigzag
- Compression ZingZang RTL Verilog source code
DCTPROGRAM.ZIP
- it is verilog code for two dimentional dct
Easy-convolution-Verilog-file
- convolution code for beginers in the field of communication
BCH[31-16]-with-BPSK-MFSK
- comperation of performance of BCH [31 16] code with BPSK and MFSK
Display-a-heart-shape-code
- Display a heart shape code点阵显示爱心形的FPGA Verilog 代码-Display a heart shape code
verilog
- CHANNEL ESTIMATION CODE
原边反馈反激变换器开环verilog代码
- 原边反馈反激变换器开环verilog代码(The primary side feedback flyback converter open-loop Verilog code)
e60a9bd4-ef5c-4c89-bfb3-9da40d5e4aba
- 低密度校验码 ，很好用的代码，功能已经实现编码和译码(Low density parity check code, very good code, the function has been achieved encoding and decoding)
CICFilter
- 一个CIC滤波器的源代码，基于verilog HDL语言(The source code of a CIC filter is based on Verilog HDL language.)
数字滤波器的MATLAB与FPGA实现例程代码567
- 数字滤波器的MATLAB与FPGA实现——杜勇(配套光盘) 程序源码，配合电子书使用可以很好的学习数字滤波器的MATLAB与FPGA实现，完整代码，仿真良好，第5、6、7章((MATLAB and FPGA implementation of digital filter -- Du Yong (supporting CD-ROM) program source code, can learn matlab and FPGA implementation of digital filter we
Chapter_9
- 数字滤波器的MATLAB与FPGA实现——杜勇(配套光盘) 程序源码，配合电子书使用可以很好的学习数字滤波器的MATLAB与FPGA实现，完整代码，仿真良好，第9章((MATLAB and FPGA implementation of digital filter -- Du Yong (supporting CD-ROM) program source code, can learn matlab and FPGA implementation of digital filter well w