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yibu_FIFO_design
- 异步FIFO实例,精通verilog hdl中的例子,供大家学习-Asynchronous FIFO instance, in the example verilog hdl proficiency for all learning
SC16C752B
- The SC16C752B is a dual Universal Asynchronous Receiver/Transmitter (UART) with 64-byte FIFOs, automatic hardware/software flow control, and data rates up to 5 Mbit/s (3.3 V and 5 V). The SC16C752B offers enhanced features. It has a Transmission