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xilinx verilog 例程
- 里面包含大量由浅入深的verilog code，欢迎下载
Verilog数字系统设计教程(第2版)
- Verilog数字系统设计教程(第2版)”这本书的思考题没有答案，要多做实验和仿真-• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are programmed o
dlx_verilog.rar
- 这是我个人写的DLX处理器流水线的Verilog代码，在ModelSim中仿真通过，并且在ISE中能综合！即可以下载到FPGA中运行指令，指令可以根据需要定义，也可和相应的编译器配合使用，这里给学习流水线和Verilog的朋友共享。,This is my personal wrote DLX pipeline processor Verilog code, adopted in the ModelSim simulation and can be integrated in the ISE! T
speech
- 用verilog HDL实现自相关算法！ RTL级可综合代码！ 通过modelsim5.6仿真和quartusii7.1综合！-Verilog HDL using auto-correlation algorithm to achieve! RTL-level code can be integrated! Through simulation and modelsim5.6 integrated quartusii7.1!
encode
- 用verilog写的8B10B编码源代码。似乎有点难度来理解。这里并未使用case语句，而是完全的用的组合逻辑化简-Use verilog write 8B10B encoding source code. Seems difficulty understood.
code
- 《无线通信FPGA设计》书里的matlab和verilog代码-the matlab and verilog code in 《Wireless Communications FPGA design》
MSK
- 用VERILOG编写的MSK调制模块的程序代码 简单易懂-MSK modulation with a VERILOG module written in easy to understand code
verilog
- verilog描述的以太网MAC层源代码，功能正确，已经在FPGA开发板上测试！需要的赶紧下-verilog descr iption of the Ethernet MAC layer source code, function correctly, has been tested in the FPGA development board! Need to hurry the next! ! !
FIFO
- 通用异步FIFO设计的verilog代码，来自于opencore-Universal Asynchronous FIFO Verilog design code, from opencore
asyn_fifo
- verilog编写的异步fifo源代码，asyn_fifo.v为顶层，调用其他四个文件-asynchronous fifo prepared Verilog source code, asyn_fifo.v for top-level, call the other four documents
ADPCMCodec
- Project and source code for ADPCM
i2c_top
- This a code for Verilog for I2C-This is a code for Verilog for I2C
verilog
- 数字信号处理的FPGA实现(Uwe Meyer-Baese)书中例子的Verilog代码-FPGA implementation of digital signal processing (Uwe Meyer-Baese) book example of Verilog code for
spi_verilog
- 实现SPI MASTER功能，并有仿真代码和仿真结果。-To achieve SPI MASTER function, and a simulation code and simulation results.
fft
- vhdl code and verilog code for an 128 point fft processor which has to be executed in xlinx software as needed for course project
serial-communication-source-code
- 这是一个有关于串口通信的原码，主要是用verilog语言来实现，采用的是模块联合方法。-This is a serial communication source code, verilog language, using the module combination method.
Mod13-counter-with-verilog-design
- verilog code for mod13 counter source code-verilog code for mod13 counter source code
A > B gate Verilog HDL
- Just a Code to help with Verilog HDL
《Verilog HDL设计与实战》配套代码（2）
- 《Verilog HDL设计与实战》配套代码 (2)("Verilog HDL design and actual combat" matching code (2))
Verilog源代码
- 多种基本功能的Verilog代码实现，包括多路选择器，二进制到BCD码转换，二进制到格雷码转换，7段译码器，8位数据锁存器，移位寄存器等等多种功能。(Verilog code implementation of a variety of basic functions, including multiplexer, binary to BCD code conversion, binary to Gray code conversion, 7-segment decoder, 8-bit dat