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speech
- 用verilog HDL实现自相关算法！ RTL级可综合代码！ 通过modelsim5.6仿真和quartusii7.1综合！-Verilog HDL using auto-correlation algorithm to achieve! RTL-level code can be integrated! Through simulation and modelsim5.6 integrated quartusii7.1!
8_oeder_signed_parellel_DA_FIR
- 本程序使用Verilog编写的程序。 本例是1个8阶对称系数的FIR滤波器，采用并行分布式算法。输入位宽为12位，输入是有符号的，即有正有负。-it s a program with Verilog
verilog-for-AES-algorithm
- 介绍了verilog HDL语言对AES算法进行数据加解密。-Introduced the verilog HDL language to AES algorithm for data encryption and decryption.
CooperativeCommunication
- 1. 研究空时分组码的编译码原理及算法； 2. 研究了几种不同的协作分集系统模型和协作分集协议； 3. 将空时分组码编译码器与协同通信用硬件描述语言Verilog实现，并在ISE集成环境中综合仿真，结果正确后下载到FPGA电路板上； 4. 用示波器观察输出数据是否正确，验证空时分组码协同通信的性能。 -1. Decoding Principles of space-time block codes and algorithms 2. Study several differen
adder
- 这是一个最简单的四位的全加器设计，由两个半加器构成，采用的是VERILOG的算法级和门级描述的。-This is one of the easiest of the four full adder design, consists of two half-adder, the VERILOG algorithm-level and gate-level descr iptions.
cf_cordic_latest.tar
- CORDIC算法 Verilog代码 支持8位、16位和32位-CORDIC Algorithm Verilog code
FPGA-implementation-of-dsp
- 《数字信号处理的FPGA实现》一书的源代码，包括verilog和VHDL版本。该书是算法的硬件实现的权威书籍。-" FPGA digital signal processing," a book of the source code, including verilog and VHDL versions. The book is the definitive book on the algorithm for hardware implementation.
code
- 用Verilog写的采用LSM算法的自适应性FIR滤波器，有testbench和主体代码，亲测可用-Written using Verilog LSM algorithm using adaptive FIR filters, and the body has testbench code, pro-test available
CORDIC
- 基于FPGA的实现CORDIC算法的实现，本算法是Verilog语言编写的-FPGA implementations achieve CORDIC algorithm, the algorithm is the Verilog language
digital-equalizer-Verilog
- 硕士论文。主要包括：1、均衡器的设计原理 2、码间串扰与均衡原理 3、自适应均衡算法，主要介绍迫零算法、LMS算法、RLS算法 4、LMS自适应均衡器的Verilog设计 5、以上算法的matlab仿真-Master thesis. The main contents are as follows: 1, the design principle of the equalizer 2, intersymbol interference (ISI) and equilibrium principl
夏老师讲义保存
- 书中的内容从算法和计算的基本概念出发，讲述如何由硬件逻辑电路来实现复杂数字逻辑的方法和技术。(The content of the book is based on the basic concepts of algorithms and computing, and describes how to implement complex digital logic by hardware logic circuits.)