基于FPGA的FIR串行滤波器设计与实现，本文运用VHDL编写-FPGA-based FIR filter design and implementation of the serial, the paper prepared by the use of VHDL

图像处理中用到的中值滤波，FPGA实现。verilog语言。-Used in image processing median filter, FPGA implementation. verilog language.