A Pipelined Implementation of AES for Altera FPGA platforms.doc

fpga the aes algorithme by using vhdl

本文介绍了AES加密算法通过不同的功能结构的FPGA实现，语言背景为VHDL-This paper details Implementation of the Encryption algorithm AES under VHDL language In FPGA by using different architecture of mixcolumn. We then review this research investigates the AES algorithm in FPGA