High performance 32-bit/40-bit floating-point processor Code compatibility—at assembly level, uses the same instruction set as other SHARC DSPs Single-instruction multiple-data (SIMD) computational architecture— two 32-bit IEEE floating-point

对提高可见光通信传输速率的研究，并提出了使用LDPC编码来降低干扰。-In order to increase a transmission rate, the transmitter is composed of plural LEDs and sends digital information by independently controlling brightness of them, which is called parallel transmissions. The r