搜索资源列表
Cyclone2_PCB_and_SCH
- 1，原创 cyclone 2开发板，希望能对FPGA电子爱好者有一点设计帮助。 2，本PCB可以与开发者自己的PCB实现扩展。 3，注意接口已经提供5v,-5v，+3.3v,+1.2v输出。 4，带一个LED显示器，多路拨动开关，一个复位健。 5，晶振源兼容5种封装，其中一种是支持9v、5W高精度恒温晶振。 6，fpga内部2个PLL相互连接可以实现0－200MHz内任意频率输出。
Cyclone_II_FPGA_sch
- altera 飓风二代开发板的原理图，pdf格式 -altera hurricane of the second generation development board schematics, pdf format
DE2_TV_New_v1
- build a tv box on fpga cyclone 2
cyclone-2.1.tar
- 超强国际象棋引擎，编码非常规范。便于分析和使用-Super chess engine, very norms coding. Facilitate the analysis and use of
16bit_display8bitLED
- Abstract七段显示器在DE2可当成Verilog的console，做为16进位的输出结果。Introduction使用环境：Quartus II 7.2 SP1 + DE2(Cyclone II EP2C35F627C6)简单的使用switch当成2进位输入，并用8位数的七段显示器显示16进位的结果。-Abstract Seven-Segment Display as Verilog to DE2 at the console, as 16 of the output binary. In
DE2_user_manual_cn.pdf
- altera de2中文手册:de2提供了实用altera cyclone 2开发高级数字产品需要的所有模块.此为对应用户指南,在30分钟里面,可以浏览许多参考设计.-de2 user manual
xiangqixuanfeng6.2
- 正版的象棋旋风象棋软件，不要错过好机会，机会难得-Genuine Tornado chess chess software, do not miss a good opportunity, a rare opportunity
cycloneIII_dev
- cycloneIII_3c120_dev_kit-v7.2.3_CDROM cycloneIII_3c120开发套件的全部CD资料-cycloneIII_3c120_dev_kit-v7.2.3_CDROM cycloneIII_3c120 all the CD information Development Kit
DE2_NET
- altera cyclone 2 net example
TUTORIAL_-_PLACA_ALTERA_DE2
- Cyclone 2 DE2 Board FPGA manual in portuguese
mltiply_machine
- verilog语言写的乘法器，每一步经过验证，毫发无损，拿出来与大家共享，在quartus II 上编程，仿真在cyclone 2上！！谢谢！-written multiplier verilog language, every step of the proven, intact, and show to share the quartus II on programming, simulation in cyclone 2 on! ! Thank you!
ep2c35
- Cyclone 2 Altera PDF
Pong
- We develop a Pong Game for Cyclone 2 Altera FPGA
ASP-upip-0.2
- web远控 ASP上线统计系统0.2 ASP上线系统默认用户密码: admin 123456 ASP上线系统必须使用IIS 5.0以上版本,且支持Asp脚本语言!不能使用小旋风等虚拟的IIS,否则无法接受数据-Web remote control ASP online statistical system 0.2 ASP on-line system default user password: admin 123456ASP on-line system must use the
OV7670initial
- ov7670硬件初始化代码，运行在alteral cyclone 2 fpga上-the hardware initializition of ov7670,running at cyclone 2 fpga platform
7_seg
- 七段显示译码器完整程序，适用芯片Cyclone 2系列-Segment display decoder complete the program, applicable to chip the Cyclone series
verilog_dds
- verilog实现dds，用于FPGA产生正弦波，适用于Cyclone 2系列-verilog achieve dds, FPGA is used to generate the sine wave, in the Cyclone Series
verilog--uart
- verilog实现uart功能的FPGA应用，适用于Cyclone 2系列-verilog uart function of FPGA applications in the Cyclone Series
verilog--sram
- ram的fpga应用，用verilog语言实现，适用于cyclone 2系列-ram the fpga application verilog language applicable to cyclone 2
Altera DE2 TV BOX with Effects Project
- Altera DE2 TV BOX with Effects Project maintaied for Cyclone 2