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8254-373
- 应用373进行地址锁存的操作8254的源代码，详细情况可向作者联系 连线： A0---Q0 A1---Q1 A2---CS -373 applications for the operation address latch 8254 source code, the details of which can be linked to the authors link : A0 A1 Q0 --- --- --- CS Q1 A2
8254
- This is a photo of a general purpose timer/counter card you can wirewrap in a weekend. It plugs into your PC s ISA bus just like a sound or modem card. It gives high-resolution timing (microseconds). Because of its programmablity, it is very powerful
8254
- 用VHDL实现了8254的全部功能
8254-2.rar
- 一个简单的8254计时的小实验,每个六十秒刷新一次,8254 a simple experiment in time, every 60 seconds refresh time
gh_timer_8254
- VHDL Source code for 8254 timer/counter
gh_vhdl_lib
- VHDL Library for 8254 timer/counter core
a8254
- 基于8254 ip 核的vhdl的实现以及对于quart 2的实现及应用-Based on the 8254 IP core of the realization of VHDL and for the implementation and application quart 2
gh_timer_8254_081608
- Timer 8254 Verilog source code
8254-Timer
- The Intel 8254 is a counter/timer device designed to solve the common timing control problems in microcomputer system design. It provides three independent 16-bit counters, each capable of handling clock inputs up to 10 MHz. All modes are softwar
a8254
- 自己编写的8254计数器／计时器，实现了所有的６种模式，和大家一起分享。-I have written 8254 counter/timer, realize all the six kinds of patterns, and the U.S. share.
iul
- 8.1 可编程并行接口芯片8255A 8.2 可编程定时器/计数器芯片8253/8254 8.3 串行通信及可编程串行接口芯片8251A 8.4 模/数（A/D）与数模（D/A）转换技术 及其接口 -8.1 programmable parallel interface chip 8255A8.2 programmable timer/counter chip 8253/82548.3 serial communications and programmable seri
xt00
- 用8086，8255，8259和8254构造系统实现对指示灯控制。 8255的PA0，PA1,PA2的三位DIP开关，通过DIP开关的闭合状态决定接在 PB口上的八个指示灯之一闪烁。如PA2,PA1,PA0为000时，PB0上所接的指 示灯闪烁，其余灯熄灭。要求闪烁频率为每秒10次。设8259地址为20H和 21H，8255地址为60H～63H，8254地址为40H～43H,时钟频率为50KHz， 8259中断向量号为70H和71H.试设计硬件连接电路，填写中断向量
8254-2
- 很好哦对你肯定有帮助哦 就有吧 俺们就是几个代码加一块 调试成功的-Oh well will certainly help to you Oh, there it is a few俺们debugging code plus a successful
8254
- 82C54 counter programming
dzz
- 设计一个定时显示装置，用实验仪左侧的六个LED数码管显示时间，时间显示格式为24小时制。分秒值为59分55秒时开始报时，每秒钟蜂鸣器鸣叫一声，到整点报时停止。 74系列模块；8254模块；8259模块；8255模块。 在PD32实验模块中验证正确 8254每25ms刷新依次 Q_0、Q_1、Q_2、Q_3分别与Q0、Q1、Q2、Q3相连 P_0、P_1、P_2分别与P0、P1、P2相连 74： CS1接340H，CS2接360H GATE0接+5V，CLOCK0接1.
a_vhdl_8253_timer_latest.tar
- 一个用VHDL语言编写的8254定时器。具有一个同步处理器接口比异步的INTEL8254要好-A VHDL 8254 timer，uses a synchronous (Wishbone) processor interface, rather than an asynchronous of the Intel 8254.
8254Verilog
- 用Verilog语言编写程序，基于FPGA实现设计8254的相关电子文件-With the Verilog programming language, based on FPGA to achieve the relevant electronic document design 8254
8255-8254模拟交通灯
- 用8255+8254做出模拟交通灯及其控制(Using 8255+8254 to make analog traffic lights and their control)