搜索资源列表
NIOS_new
- 基于Altera Cyclone系列FPGA的NIOS II开发板原理图，OrCAD格式
Nios
- Altera公司开发的用于其FPGA的的Nios软核入门介绍
xd_lcd_comp
- 一款240＊128的LCD模块在ALTERA FPGA NIOS中的应用，自己写的AVALON总线IP，包括所有源码，可轻松用于NIOS中，供大家参考
NiosII_implementation_in_CCD_C
- The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, cur
FPGA-DE1-PACMAN
- Pacman 4 DE1-FPGA-Board
DE2_EP2C35
- EP2C35开发板官方原理图,是altera的官方资料。是fpga电路设计的很好参考典范。-EP2C35 official development board schematics, is altera of official information. Fpga circuit design is a good reference model.
c2h_fft_cyclone_ii
- 关于用c2h实现fft算法的源代码和说明书 altera-On C2H achieve fft algorithm using the source code and a detailed descr iption of altera
fpga
- 包含5款ALTERA FPGA开发板原理图合集.包含:Cyclone1C20的Nios开发板Cyclone_II_EP2C20_原理图 EP1C3T144 EPM1270F256C5-Contains 5 ALTERA FPGA development board schematics collection. Include: Cyclone1C20 the Nios development board schematics EP1C3T144 EPM1270F256C5 Cyclone
flash_controller
- Altera下的FPGA运行Nios处理器的flash控制器-Altera
tut_nios2_introduction
- This tutorial presents an introduction to Altera’s Nios R II processor, which is a soft processor that can be in- stantiated on an Altera FPGA device. It describes the basic architecture of Nios II and its instruction set. The NiosII processor a
MTDB_SYSTEM_CD_V1.0
- ALTERA Nios II Embedded Evaluation Kit开发板制造商(terasic)提供的多媒体显示板（Terasic Multimedia Touch Panel Daughter Board (MTDB)）扩展开发包。 里为有两个开源的例子 1.MTDB_SD_Card_Audio,从SD卡中读取WAV文件然后通过DA播放，这个对不SD Card的初学者非常的有用，可以知道使用FPGA SPI来读写SD CARD。 2.MTDB_Systhesiz
DE2_NIOS_DEVICE_LED
- Altera FPGA 上利用nios嵌入式处理器实现USB的通信控制-Altera FPGA embedded processor nios use USB communication to achieve control
Lab2a
- C Code for a Nios II to switch led on a board with an FPGA ALTERA
LED
- 本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA 公司的 Cyclone II 系列 FPGA 为数字平台，将微处理器、Avalon 总线、LED 点阵扫描控制器、存储器和人机接口控制器等硬件设备集中在一片 FPGA 上，利用片内硬件来实现 LED 点阵的带地址扫描，降低系统总功耗和简化 CPU 编程的同时，提高了系统的精确度、稳定性和抗干扰性能。-This design used the Nios II embedded processor based o
DDR SDRAM Design Tutorials
- Altera公司的基于NIOSII设计DDR和DDR2内存的资料，很有帮助的，-Based on Altera' s DDR and DDR2 memory NIOSII design information, useful,
ALTERA based NIOS system
- 基于ALTERA的NIOS系统的车载显示系统(车载摄像头和TFT显示器)设计源代码(ALTERA based NIOS system on-board display system (on-board camera and TFT display) design source code)
Deca_linux_package
- Deca_linux_package 开发包文件，应用FPGA开发 nios 的Linux应用(Deca_linux_package dvelopment document for FPGA altera nios use linux)
altremote_update_cyclone5
- altera remote updata cyclone5 平台例程，无nios核版本(altera remote updata cyclone5 platform routine do not use nios)
NIOS-II常用函数详解
- Nios II系列软核处理器是Altera的第二代FPGA嵌入式处理器，其性能超过200DMIPS，。Altera的Stratix 、Stratix GX、 Stratix II和 Cyclone系列FPGA全面支持Nios II处理器，以后推出的FPGA器件也将支持Nios II。(The Nios II family of soft core processors is the second generation of Altera's FPGA embedded processor tha