搜索资源列表
VHDL_FIR
- 个人认为比较使用的几个VHDL源码之三FIR的源码-personally think that the use of the relatively few VHDL source of the ter FIR FOSS
vhdl_fir
- 在matlab仿真的基础上，用maxplus2实现等波纹法的程序代码
vhdl_fir
- 1、输入输出数据宽度为12位， 2、阶数为4阶段线性相位FIR滤波器， 3、类型为：低通。 -1, input and output data width is 12, 2, 4 stages of the order of linear phase FIR filter, 3, type: low pass.
vhdl_fir
- 这是一个vhdl语言写的fir filter，包括receiver, filter, transfer,可用于驱动fpga等板子-this is a fir filter use VHDL language, include receiver, filter, transfer. can be used to drive fpga and some else boards
VHDL_FIR
- VHDL设计的14阶FIR滤波器，根据已给出滤波器系数以及验证程序，选用Altera的EP2S60F484C3器件进行设计。-VHDL design of the 14-order FIR filter design, according to the filter coefficients as well as the verification process has been given the EP2S60F484C3 selected Altera devices.