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using_the_block_ram_in_Spartan-3_fpga
- Spartan-3 系列 fpga 中的 block ram 的使用-using the block ram in Spartan-3 fpga
dds_easy
- 直接频率合成DDS模块的ise工程，可以直接下载，在Spartan3/Spartan3E上验证通过。该DDS模块可以产生双通道的不同频率的正弦波，也可以产生同频的任意相位差的相移波形。本模块累加器位数为32位，可以产生12位相位精度12位量化精度的正弦波。该设计例化一个block ram，为节省储存空间仅需要储存1/4周期的数据。根据需要，可以重新修改数据，改变波形。-DDS direct frequency synthesizer module ，ise project, can be dir
TechXclusives-Reconfiguringblockrams
- Xilinx fpga block ram reconfig via JTAG
TechXclusives-UsingLeftoverMultipliersandblockram
- Xilinx fpga using leftover multipliers and block ram
spartan6_fpga_blockram_user_guide
- Spartan6 fpga中的块存储器使用指南，可以构建为FIFO，ROM，ram，移位寄存器等。-Spartan6 fpga block memory in the User Guide, you can build for FIFO, ROM, ram, shift registers and so on.
read
- 在fpga内部实现ram块中数据的读出，简单方便。-Internal implementation in fpga block ram read data
Using-the-Virtex-block-SelectramP
- The Virtex™ series provides dedicated blocks of on-chip, true dual-read/write port synchronous ram, with 4096 memory cells. Each port of the block Selectram+™ memory can be independently configured as a read/write port, a read port, o
635022219123437500
- 基于fpga的CAM设计，CAM设计的方案和代码。-Using block ram for High Performance Read/Write CAMs
ex9_cof_M4K_test1
- fpga器件中通常嵌入一些用户可配置的存储块，此代码是关于基M4K块的单ram配置仿真实验。 -fpga devices are usually embedded memory blocks some user-configurable, this code is based on a single M4K block ram configuration simulation.
block_ram
- ditributed ram in fpga and block ram in fpga