此資料夾為實現一單一時脈週期MIPS32處理器架構源碼，包含了控制單元、資料記憶體、資料路徑、指令記憶體四個部分，以程式碼: (共10個)  instruction_mem.v、data_mem.v  control.v、alu_control.v  program_counter.v、reg_file.v  alu_32bit.v、adder_32.v、sign_extend.v來實現。-MIPS (originally

PROJECT for misp32 microprocessor pipline

RT-Thread source code(RT-Thread is an open source IoT operating system from China, which has strong scalability: from a tiny kernel running on a tiny core, for example ARM Cortex-M0, or Cortex-M3/4/7, to a rich feature system running on MIPS32, ARM C