搜索资源列表
Free ARM-7 Core (Verilog) 可跑 uClinux
- 一个 Free 的 ARM-7 Core,是使用 Verilog 编成,综合后占用资源小,可以执行 uClinux 等程序或系统,内附详细说明的 PDF 档及源码 Verilog 编程等.
USB2.0IP.rar
- 完整的用VERILOG语言开发的USB2.0 IP核源代码,包括文档,Complete Verilog language developed by USB2.0 IP core source code, including documentation
SPI_verilog_vhdl.rar
- SPI串口的内核实现（分别使用verilog和vhdl语言描述的）,The core of the realization of SPI serial port (using Verilog and VHDL language descr iption of the)
fft_verilog.rar
- FFT IP core 源码 状态控制机,FFT IP core
RISC8.ZIP
- verilog RISC8 cpu CORE 8位RISC CPU 内核源码（VERILOG 版）-verilogRISC8 cpu CORE8-bit RISC CPU core source (VERILOG version)
VERILOG-USB2.0IP-core
- 完整的用VERILOG语言开发的USB2.0 IP核源代码，包括文档、仿真文件-VERILOG language with a complete development of USB2.0 IP core source code, including files, simulation files
10100MIP
- 以太网10100M IP核Verilog源码(可综合)\以太网10-100M IP核Verilog源码，可综合-10100M IP Ethernet core Verilog source code (which can be integrated) \ 10-100M IP Ethernet core Verilog source code can be integrated
video_from_opencore
- 全电视信号编码器，verilog的，看看有借鉴价值否？-video signal encoder, Verilog, to see whether the reference value?
8051core-Verilog
- 8051的verilog内核，fpga里实现8051的话用得上-8051 Verilog cores, fpga achieve useful 8051 words
can.tar
- can控制器IP核，verilog语言描述实现。含测试例-can controller IP core, verilog language described realize. Containing the test cases
8051core-Verilog
- 8051内核的verilog描述，对学习EDA和处理器设计很有用的资料。-The disigning of the core 8051 using verilog language.
CAST_jpeg_d-xact
- JPEG_D IP Core Verilog crypted source
43680540SPI_Core
- Verilog for SPI Core source code
8051core-Verilog
- mcu 8051 core,simply,easy study and understand,very good for study 8051
c54x_verilog
- TI 的TMS320C54X的DSP的芯片软核verilog源代码，可以帮助初学者深入了解该系列DSP片内资源核结构，值得参考！-TMS320C54X of TI' s DSP chip soft-core verilog source code, can help beginners a better picture of the family of DSP-chip resources, nuclear structure, it is also useful!
aes_core
- aes_core verified verilog ip core-aes_core verified verilog ip core
8051core-Verilog
- C51 verilog 源代码，可以在逻辑中实现51单片机功能-C51 verilog
arm7
- ARM7core verilog 源代码-ARM7 core verilog source code
syn-fifo-verilog
- 用verilog语言写的同步FIFO设计源代码。-The source codes for syn-fifo using verilog language.
ethernet10-100M-IP-core
- 以太网10-100M IP核Verilog源码，可综合-Ethernet 10-100M IP core Verilog source code can be integrated