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convolution_encoder_VHDL
- 卷积码编译码,由SERVICE、PSDU、TAIL和PAD域组成的DATA域应进行卷积编码，码率应根据所需的传输速率从R=1/2,2/3,3/4中选择-for 802.11a simulation WLAN FEC convolution_encoder g0=133 g1=171 Rate 0:1/2 1:2/3 2:3/4 for 802.11a simulation
3av_0803_all_files
- 有关10G EPON 中FEC的代码，及其一些算法流程，相关介绍等。-10G EPON in the FEC-related code, and some algorithm processes, such as the related presentations.
85375546FEC
- it is fec code in vhdl-it is fec code in vhdl
viterbi-3.0.1
- 前向纠错viterbi-3.0.1的实现 测试通过-FEC viterbi-3.0.1 implementation tested
vhdl-fec
- vhdl implimentation using forward error correcting codes this will incresing signal to noise ration