搜索资源列表
fpga_jpeg
- 图像jpeg压缩算法,用verilog HDL在FPGA上的实现 -Jpeg image compression algorithm, using verilog HDL Implementation in FPGA
fpgajpeg
- fpga实现图像的压缩，适合初学者，很快了解图像压缩和verilog-fpga to achieve image compression, suitable for beginners, will soon understand the image compression and verilog
EP1C3_12_5_RSV
- 基于ＦＰＧＡ的数字存储示波器，用ＶＨＤＬ实现的，压缩包里是Quartus工程。AD采样送进FPGA，存入SRAM后用DA在普通示波器上可以显示。-FPGA-based digital storage oscilloscope, using VHDL achieved compression is Quartus project bag. AD sample into FPGA, after SRAM into DA in ordinary oscilloscope can display.
Chapter6-9
- 第六章到第九章的代码 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例
fpga-jpeg
- fpga based jpge 压缩算法， 性能不错，-fpga based jpge compression algorithm, performance good,
jpeg_rgb
- 这是JPEG图像压缩的RGB转换的源代码，其中还包括了它的仿真测试代码，希望能帮助到大家。-This is the JPEG image compression of RGB conversion source code, including its simulation test code, hoping to help you.
SAR-GMTI Range Compression Implementation in FPGAs
- SAR-GMTI_Range_Compression_Implementation_in_FPGAs 在多FPGA阵列上实现SAR距离脉压，超长点数脉压的FPGA实现-SAR-GMTI_Range_Compression_Implementation_in_FPGAs in the realization of multi-FPGA array SAR from the pulse pressure, long pulse pressure points to achieve th
EP1C3_12_7_SPCTR
- 基于FPGA的信号采集及频谱分析，用VHDL编写，压缩包里是Quartus下的工程。AD采样用状态机实现，并存入LPM_RAM。设计了一个UART模块（也是状态机实现的），可将数据发到ＰＣ机上。-FPGA-based signal acquisition and spectral analysis, prepared with VHDL, Quartus compression bag is the next project. AD sampling state machine used to
EP1C3_12_1_2_MOTO
- 基于FPGA的直流电机的PWM控制和步进电机的细分驱动控制。使用VHDL语言编写，压缩包里是Quartus下的工程。-FPGA-based PWM DC motor control and stepper motor-driven control of a breakdown. The use of VHDL language, compression bag is under the Quartus project.
MQdecoder
- Verilog HDL 实现的JPEG200的MQ解码-JPEG2000 MQ DECODER BASED ON FPGA， Verilog HDL
FPGA_image
- fpga实现图像处理，JPEG标准下图象压缩，VHDL语言编程。-fpga implementation image processing, JPEG image compression under the standard, VHDL language programming.
Chapter16
- Video compression using FPGA in XILINX
juzhenqiuni_FPGA
- RMMSE雷达脉冲压缩快速算法中矩阵求逆的FPGA实现-RMMSE radar pulse compression fast algorithm for FPGA implementation matrix inversion
dct
- JPEG Compression and Ethernet Communication on an FPGA
1
- FPGA图像压缩代码，可以在nios2上实现。包括压缩和解压缩-FPGA image compression code that can be realized in the nios2. Including the compression and decompression
FPGA
- 视频压缩技术研究及FPGA实现探讨 视频压缩技术研究及FPGA实现探讨-Video compression technology and its FPGA implementation of video compression technology and its FPGA implementation of
H.264decodeVerilog
- 基于FPGA的EDA设计技术，用Verilog硬件设计语言解压缩H.264格式的视频压缩文件。-FPGA-based EDA design, using Verilog hardware design language decompress H.264 video compression format file.
dm642-jpegdemo
- 用于TI dm642平台的jpeg压缩程序-Platform for TI dm642 jpeg compression program
image-compression
- 实现jpeg图像压缩，基于FPGA的JPEG图像压缩算法实现 基于FPGA的JPEG图像压缩系统的实现(Image compression of JPEG based on MATLAB， 实现jpeg图像压缩，基于FPGA的JPEG图像压缩算法实现 基于FPGA的JPEG图像压缩系统的实现 JPEG image compression, JPEG image compression algorithm based on FPGA implementation of FPGA based J
H.265视频压缩的FPGA实现
- 使用verilog语言实现H.265压缩算法，能够实现实时视频数据的压缩传输(Using Verilog language to realize h.265 compression algorithm can realize the compression and transmission of real-time video data)