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  1. VS1003

    1下载:
  2. VS1003音频解码芯片为VS10XX系列的第三代产品,是芬兰VLSI Solution Oy公司生产的单片MP3/WMA/MIDI解码和ADPCM编码芯片,它内部包含一个高性能、低功耗的DSP处理核(VSDSP),一个工作内存,一片可供用户程序使用的5.5KB RAM,一个串行SPI总线接口,一个高质量的采样频率可调的过采样DAC以及一个16位的采样ADC.-VS1003 Audio Decoder Chip for VS10XX series of the third-generation
  3. 所属分类:其他嵌入式/单片机内容

    • 发布日期:2008-10-13
    • 文件大小:1.02mb
    • 提供者:corrkgs
  1. CPLD

    0下载:
  2. This paper presents a low-power asynchronous implementation of the 80C51 microcontroller. It was realized in a 0.5 µ m CMOS process and it shows a power advantage of a factor 4 compared to a recent synchronous implementation in the same technolo
  3. 所属分类:文件操作

    • 发布日期:2008-10-13
    • 文件大小:96.51kb
    • 提供者:啊灿
  1. seminar040227

    0下载:
  2. Low Power VLSI Design For Multimedia Applications
  3. 所属分类:Windows Develop

    • 发布日期:2017-04-25
    • 文件大小:468.06kb
    • 提供者:photo26
  1. SOCLowPower

    0下载:
  2. 功耗问题正日益变成VLSI系统实现的一个限制因素。对便携式应用来说,其主要原因在于电池寿命,对固定应用则在于最高工作温度。由于电子系统设计的复杂度在日益提高,导致系统的功耗得到其主要功耗成分。其次,以该主要功耗成分数学表达式为依据,突出实现SoC低功耗设计的各种级别层次的不同方法。-VLSI power problems are increasingly becoming a limiting factor in system implementation. For portable appli
  3. 所属分类:Project Design

    • 发布日期:
    • 文件大小:20.52kb
    • 提供者:李希楠
  1. VLSI-Term-paper-[Compatibility-Mode]

    0下载:
  2. Design of Low Power Phase-Locked Loop Using VLSI Technology
  3. 所属分类:Communication

    • 发布日期:2017-04-07
    • 文件大小:707.94kb
    • 提供者:Akash
  1. -Elliptic

    0下载:
  2. We present elliptic curve cryptography (ECC) coprocessor, which is dual-field processor with projective coordinator. We have implemented architecture for scalar multiplication, which is key operation in elliptic curve cryptography. Our coproc
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-01
    • 文件大小:114.43kb
    • 提供者:陳曉慧
  1. Abstract

    0下载:
  2. low power vlsi techniques
  3. 所属分类:software engineering

    • 发布日期:2017-04-14
    • 文件大小:2.93kb
    • 提供者:ramu
  1. LOW-POWER-VLSI

    0下载:
  2. comprehensive introductory chapter presents the current status of the industry and academic research in the area of low power VLSI design and technology. Other topics cover logic synthesis, floorplanning, circuit design and analysis, from the p
  3. 所属分类:Development Research

    • 发布日期:2017-05-16
    • 文件大小:4.16mb
    • 提供者:vel
  1. VLSI

    0下载:
  2. The AD7654 is a low cost, simultaneous sampling, dual-channel, 16-bit, charge redistribution SAR, analog-to-digital converter that operates from a single 5 V power supply. It contains two low noise, wide bandwidth, track-and-hold amplifiers that allo
  3. 所属分类:Project Design

    • 发布日期:2017-11-18
    • 文件大小:3.78mb
    • 提供者:vxl
  1. verilog-FAQ

    0下载:
  2. Low power SRAMs have become a critical component of many VLSI chips. This is true for microprocessors, where on-chip cache sizes are growing with each generation to bridge the increasing divergence in the speeds of the processor and main memory. Simu
  3. 所属分类:Project Design

  1. VLSI5

    0下载:
  2. vlsi papers low power area
  3. 所属分类:Communication

    • 发布日期:2017-06-19
    • 文件大小:27.68mb
    • 提供者:sakthivel
  1. 51nrf905

    0下载:
  2. nRF905 是挪威 Nordic VLSI 公司推出的单片射频收发器,工作电压为 1.9 ~3.6V, 32 引脚 QFN 封装 (5×5mm),工作于 433/868/915MHz 三个 ISM(工业、科学和医学)频道,频道之间的转换时间小于 650us。 nRF905 由频率合成器、接收解调器、功率放大器、晶体振荡器和调制器组成,不需外加声表滤波器, ShockBurstTM 工作模式,自动处理字头和 CRC(循环冗余码校验),使用 SPI 接口与微控制器通信,配置非 常方便。此外,
  3. 所属分类:Other Embeded program

    • 发布日期:2017-04-25
    • 文件大小:29.83kb
    • 提供者:jason
  1. low-ref

    0下载:
  2. LOW POWER REFERENCE PAPER FOR VLSI DESIGN
  3. 所属分类:Communication-Mobile

    • 发布日期:2017-04-29
    • 文件大小:273.69kb
    • 提供者:senthilraj
  1. 006__10.1109@jsee.2013.00047

    0下载:
  2. Reduced bit low power VLSI architectures for motion estimation
  3. 所属分类:Project Design

    • 发布日期:2017-05-03
    • 文件大小:745.34kb
    • 提供者:praba
  1. SAIFI-VLSI-114

    0下载:
  2. Low-Power Programmable PRPG With Test Compression Capabilities
  3. 所属分类:Development Research

  1. ShirazHusainVSRD

    0下载:
  2. REVIEW:LOW POWER VLSI DESIGN TECHNIQUES EXPLORING SLEEP TRANSISTOR, FORCED STACK AND SLEEPY STACK
  3. 所属分类:Project Design

    • 发布日期:2017-12-14
    • 文件大小:437.17kb
    • 提供者:dilip mandloi
  1. bist 2017 paper

    0下载:
  2. A new low-power (LP) scan-based built-in selftest (BIST) technique is proposed based on weighted pseudorandom test pattern generation and reseeding. A new LP scan architecture is proposed, which supports both pseudorandom testing and deterministi
  3. 所属分类:VHDL/FPGA/Verilog

    • 发布日期:2017-12-24
    • 文件大小:1.5mb
    • 提供者:Maddy619
  1. Low-Power CMOS Acquisition

    0下载:
  2. A low-power analog acquisition front-end circuit for Wireless Body Area Network (WBAN).
  3. 所属分类:其他

    • 发布日期:2018-04-20
    • 文件大小:869kb
    • 提供者:praba
  1. jeas_reversable-vedic-multiplier

    0下载:
  2. reversible logic is mainly used to achieve low power. peres gate HUG gate is used to design a vedic multiplier. reversible gate we can give n numbers of input and we can get n number of output
  3. 所属分类:其他

    • 发布日期:2018-04-28
    • 文件大小:544kb
    • 提供者:paramu
  1. LOW POWER VLSI REPORT - SHORT CIRCUIT POWER

    0下载:
  2. short circuit power analysis of inverter for different rise time, fall time and capacitor value as simulated in Tanner tool.
  3. 所属分类:其他

    • 发布日期:2018-04-29
    • 文件大小:820kb
    • 提供者:assh
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