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aes加密算法实现，经过FPGA验证的
- aes加密算法实现，经过FPGA验证的！,aes encryption algorithm, after FPGA validation!
aes
- verilog实现的AES-128加解密程序，FPGA验证通过-verilog implementation of AES-128 encryption and decryption process, FPGA verification through
aes_inv_cipher_top
- aes ip core, 128 bits
aes
- aes的加密解密算法的源代码以及测试源代码和仿真结果图-aes encryption decryption algorithm source code and test source code and simulation results map
高级加密算法
- AES加密和解密源码！-AES encryption and decryption source!
CoreAES128
- Full AES Simulation Code
RIJNDAEL_EN_TOP
- AES加密运算模块，运算速率100Mbps，请大家参考-AES encryption algorithms module, computing speed 100Mbps, please refer to
RIJNDAEL_DE_TOP
- AES解密运算模块，运算速率100Mbps，请大家参考-AES decryption computing module, computing speed 100Mbps, please refer to
aes_crypto_core_latest.tar
- Consecutive AES core Descr iption of project.. Features - AES encoder - 128/192/256 bit - AES decoder - 128/192/256 bit Status - Key Expansion added - Encoder added - Decoder added - Documentation added
AES
- AES算法的verilog代码，即AES算法IP核-ip core for AES
aes
- vhdl implementation of the AES encryption algorithm
mini_aes_latest[1].tar
- AES 加解密 代码, 有文档说明，testbench-AES encoding decoding source code in HDL
platforms
- A Pipelined Implementation of AES for Altera FPGA platforms.doc
aes
- 实现了AES在赛灵思器件上的加密程序 我已经调试过完全正确-Xilinx achieved in AES encryption device debugging process I have been absolutely correct
aesencryption
- Aes encryption on Fpga
AES
- This the source code of AES algorithm which is used in network security.-This is the source code of AES algorithm which is used in network security.
systemcaes_latest.tar
- 高级加密标准aes加密算法用fpga实现的Verilog源代码。-Advanced encryption standard aes encryption algorithm using fpga implementation Verilog source code.
aes_crypto_core_latest.tar
- verilog code for aes
AES_package
- aes package ...for yhdl compiles on xilinks we-aes package ...for yhdl compiles on xilinks well
AES
- AES implementation in VHDL@!