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文件名称:UART

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  • 上传时间:
    2012-11-16
  • 文件大小:
    377.88kb
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actel 公司 Fusion StartKit开发板串口实验,采用veilog 语言编写,易于理解-actel Company Fusion StartKit development board serial experiments using veilog language, easy to understand
相关搜索: actel uart actel

(系统自动生成,下载前可以参看下载内容)

下载文件列表

UART实验例程/Source/Fusion_UART/rec.v
UART实验例程/Source/Fusion_UART/send.v
UART实验例程/Source/Fusion_UART/uart_test.v
UART实验例程/Source/Fusion_UART
UART实验例程/Source
UART实验例程/Project/Fusion_UART/uart.prj
UART实验例程/Project/Fusion_UART/viewdraw/viewdraw.ini
UART实验例程/Project/Fusion_UART/viewdraw/wir
UART实验例程/Project/Fusion_UART/viewdraw/vf/project.lst
UART实验例程/Project/Fusion_UART/viewdraw/vf
UART实验例程/Project/Fusion_UART/viewdraw/sym
UART实验例程/Project/Fusion_UART/viewdraw/sch
UART实验例程/Project/Fusion_UART/viewdraw
UART实验例程/Project/Fusion_UART/synthesis/.recordref
UART实验例程/Project/Fusion_UART/synthesis/run_options.txt
UART实验例程/Project/Fusion_UART/synthesis/stdout.log
UART实验例程/Project/Fusion_UART/synthesis/traplog.tlg
UART实验例程/Project/Fusion_UART/synthesis/uart_test.areasrr
UART实验例程/Project/Fusion_UART/synthesis/uart_test.edn
UART实验例程/Project/Fusion_UART/synthesis/uart_test.fse
UART实验例程/Project/Fusion_UART/synthesis/uart_test.htm
UART实验例程/Project/Fusion_UART/synthesis/uart_test.map
UART实验例程/Project/Fusion_UART/synthesis/uart_test.sap
UART实验例程/Project/Fusion_UART/synthesis/uart_test.sdf
UART实验例程/Project/Fusion_UART/synthesis/uart_test.srd
UART实验例程/Project/Fusion_UART/synthesis/uart_test.srm
UART实验例程/Project/Fusion_UART/synthesis/uart_test.srr
UART实验例程/Project/Fusion_UART/synthesis/uart_test.srs
UART实验例程/Project/Fusion_UART/synthesis/uart_test.tlg
UART实验例程/Project/Fusion_UART/synthesis/uart_test_drc.rpt
UART实验例程/Project/Fusion_UART/synthesis/uart_test_sdc.sdc
UART实验例程/Project/Fusion_UART/synthesis/uart_test_syn.prj
UART实验例程/Project/Fusion_UART/synthesis/syntmp/sap.log
UART实验例程/Project/Fusion_UART/synthesis/syntmp/uart_test.msg
UART实验例程/Project/Fusion_UART/synthesis/syntmp/uart_test.plg
UART实验例程/Project/Fusion_UART/synthesis/syntmp/uart_test_flink.htm
UART实验例程/Project/Fusion_UART/synthesis/syntmp/uart_test_srr.htm
UART实验例程/Project/Fusion_UART/synthesis/syntmp/uart_test_toc.htm
UART实验例程/Project/Fusion_UART/synthesis/syntmp
UART实验例程/Project/Fusion_UART/synthesis/synthesis_identify/uart_test.srs
UART实验例程/Project/Fusion_UART/synthesis/synthesis_identify/uart_test.tlg
UART实验例程/Project/Fusion_UART/synthesis/synthesis_identify/syntmp/identify.msg
UART实验例程/Project/Fusion_UART/synthesis/synthesis_identify/syntmp/uart_test.msg
UART实验例程/Project/Fusion_UART/synthesis/synthesis_identify/syntmp/uart_test_flink.htm
UART实验例程/Project/Fusion_UART/synthesis/synthesis_identify/syntmp
UART实验例程/Project/Fusion_UART/synthesis/synthesis_identify
UART实验例程/Project/Fusion_UART/synthesis/backup
UART实验例程/Project/Fusion_UART/synthesis
UART实验例程/Project/Fusion_UART/stimulus/BtimErrors.log
UART实验例程/Project/Fusion_UART/stimulus/files_to_build.txt
UART实验例程/Project/Fusion_UART/stimulus/hdlsynchk.tcl
UART实验例程/Project/Fusion_UART/stimulus/uart_test.dsk
UART实验例程/Project/Fusion_UART/stimulus/uart_test.hpj
UART实验例程/Project/Fusion_UART/stimulus/uart_test.v
UART实验例程/Project/Fusion_UART/stimulus/uart_test_tbench.bk
UART实验例程/Project/Fusion_UART/stimulus/uart_test_tbench.btim
UART实验例程/Project/Fusion_UART/stimulus/uart_test_tbench.v
UART实验例程/Project/Fusion_UART/stimulus/waveperl.log
UART实验例程/Project/Fusion_UART/stimulus
UART实验例程/Project/Fusion_UART/smartgen/smartgen.aws
UART实验例程/Project/Fusion_UART/smartgen
UART实验例程/Project/Fusion_UART/simulation/meminit.dat
UART实验例程/Project/Fusion_UART/simulation/modelsim.ini
UART实验例程/Project/Fusion_UART/simulation/modelsim.ini.sav
UART实验例程/Project/Fusion_UART/simulation
UART实验例程/Project/Fusion_UART/phy_synthesis
UART实验例程/Project/Fusion_UART/hdl/hdlsynchk.tcl
UART实验例程/Project/Fusion_UART/hdl/rec.v
UART实验例程/Project/Fusion_UART/hdl/send.v
UART实验例程/Project/Fusion_UART/hdl/uart_test.v
UART实验例程/Project/Fusion_UART/hdl
UART实验例程/Project/Fusion_UART/designer/impl1/designer.log
UART实验例程/Project/Fusion_UART/designer/impl1/designer_genhdl.log
UART实验例程/Project/Fusion_UART/designer/impl1/uart_test.adb
UART实验例程/Project/Fusion_UART/designer/impl1/uart_test.ide_des
UART实验例程/Project/Fusion_UART/designer/impl1/uart_test.pdb
UART实验例程/Project/Fusion_UART/designer/impl1/uart_test.pdb.depends
UART实验例程/Project/Fusion_UART/designer/impl1/uart_test.stp
UART实验例程/Project/Fusion_UART/designer/impl1/uart_test.tcl
UART实验例程/Project/Fusion_UART/designer/impl1/uart_test_ba.sdf
UART实验例程/Project/Fusion_UART/designer/impl1/uart_test_ba.v
UART实验例程/Project/Fusion_UART/designer/impl1/uart_test.dtf/verify.log
UART实验例程/Project/Fusion_UART/designer/impl1/uart_test.dtf
UART实验例程/Project/Fusion_UART/designer/impl1/simulation
UART实验例程/Project/Fusion_UART/designer/impl1
UART实验例程/Project/Fusion_UART/designer
UART实验例程/Project/Fusion_UART/coreconsole
UART实验例程/Project/Fusion_UART/constraint/uart_test.pdc
UART实验例程/Project/Fusion_UART/constraint
UART实验例程/Project/Fusion_UART/component
UART实验例程/Project/Fusion_UART
UART实验例程/Project
UART实验例程

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