CDN加速镜像 | 设为首页 | 加入收藏夹
当前位置: 首页 资源下载 源码下载 嵌入式/单片机编程 VHDL编程

文件名称:spi

  • 所属分类:
  • 标签属性:
  • 上传时间:
    2012-11-16
  • 文件大小:
    2.65mb
  • 已下载:
    0次
  • 提 供 者:
  • 相关连接:
  • 下载说明:
    别用迅雷下载,失败请重下,重下不扣分!
电信下载 联通下载
别用迅雷、360浏览器下载。
如迅雷强制弹出,可右键点击选“另存为”。
失败请重下,重下不扣分。

介绍说明--下载内容来自于网络,使用问题请自行百度

this the SPI slave module -this is the SPI slave module
相关搜索: verilog SPI SPI_SLAVE VERIL

(系统自动生成,下载前可以参看下载内容)

下载文件列表

spi/
spi/branches/
__MACOSX/
__MACOSX/spi/
__MACOSX/spi/._branches
spi/tags/
spi/tags/asyst_2/
spi/tags/asyst_2/rtl/
spi/tags/asyst_2/rtl/verilog/
spi/tags/asyst_2/rtl/verilog/spi_clgen.v
spi/tags/asyst_2/rtl/verilog/spi_defines.v
__MACOSX/spi/tags/
__MACOSX/spi/tags/asyst_2/
__MACOSX/spi/tags/asyst_2/rtl/
__MACOSX/spi/tags/asyst_2/rtl/verilog/
__MACOSX/spi/tags/asyst_2/rtl/verilog/._spi_defines.v
spi/tags/asyst_2/rtl/verilog/spi_shift.v
spi/tags/asyst_2/rtl/verilog/spi_top.v
__MACOSX/spi/tags/asyst_2/rtl/verilog/._spi_top.v
spi/tags/asyst_2/rtl/verilog/timescale.v
__MACOSX/spi/tags/asyst_2/rtl/verilog/._timescale.v
__MACOSX/spi/tags/asyst_2/rtl/._verilog
__MACOSX/spi/tags/asyst_2/._rtl
__MACOSX/spi/tags/._asyst_2
spi/tags/asyst_3/
spi/tags/asyst_3/rtl/
spi/tags/asyst_3/rtl/verilog/
spi/tags/asyst_3/rtl/verilog/spi_clgen.v
__MACOSX/spi/tags/asyst_3/
__MACOSX/spi/tags/asyst_3/rtl/
__MACOSX/spi/tags/asyst_3/rtl/verilog/
__MACOSX/spi/tags/asyst_3/rtl/verilog/._spi_clgen.v
spi/tags/asyst_3/rtl/verilog/spi_defines.v
__MACOSX/spi/tags/asyst_3/rtl/verilog/._spi_defines.v
spi/tags/asyst_3/rtl/verilog/spi_shift.v
spi/tags/asyst_3/rtl/verilog/spi_top.v
__MACOSX/spi/tags/asyst_3/rtl/verilog/._spi_top.v
spi/tags/asyst_3/rtl/verilog/timescale.v
__MACOSX/spi/tags/asyst_3/rtl/verilog/._timescale.v
__MACOSX/spi/tags/asyst_3/rtl/._verilog
__MACOSX/spi/tags/asyst_3/._rtl
__MACOSX/spi/tags/._asyst_3
spi/tags/initial/
spi/tags/initial/bench/
spi/tags/initial/bench/verilog/
spi/tags/initial/bench/verilog/spi_slave_model.v
spi/tags/initial/bench/verilog/tb_spi_top.v
spi/tags/initial/bench/verilog/wb_master_model.v
__MACOSX/spi/tags/initial/
__MACOSX/spi/tags/initial/bench/
__MACOSX/spi/tags/initial/bench/._verilog
__MACOSX/spi/tags/initial/._bench
spi/tags/initial/doc/
spi/tags/initial/doc/src/
spi/tags/initial/doc/src/spi.doc
__MACOSX/spi/tags/initial/doc/
__MACOSX/spi/tags/initial/doc/src/
__MACOSX/spi/tags/initial/doc/src/._spi.doc
__MACOSX/spi/tags/initial/doc/._src
__MACOSX/spi/tags/initial/._doc
spi/tags/initial/rtl/
spi/tags/initial/rtl/verilog/
spi/tags/initial/rtl/verilog/spi_clgen.v
__MACOSX/spi/tags/initial/rtl/
__MACOSX/spi/tags/initial/rtl/verilog/
__MACOSX/spi/tags/initial/rtl/verilog/._spi_clgen.v
spi/tags/initial/rtl/verilog/spi_defines.v
__MACOSX/spi/tags/initial/rtl/verilog/._spi_defines.v
spi/tags/initial/rtl/verilog/spi_shift.v
__MACOSX/spi/tags/initial/rtl/verilog/._spi_shift.v
spi/tags/initial/rtl/verilog/spi_top.v
__MACOSX/spi/tags/initial/rtl/verilog/._spi_top.v
spi/tags/initial/rtl/verilog/timescale.v
__MACOSX/spi/tags/initial/rtl/verilog/._timescale.v
__MACOSX/spi/tags/initial/rtl/._verilog
__MACOSX/spi/tags/initial/._rtl
spi/tags/initial/sim/
spi/tags/initial/sim/run/
spi/tags/initial/sim/run/sim
__MACOSX/spi/tags/initial/sim/
__MACOSX/spi/tags/initial/sim/run/
__MACOSX/spi/tags/initial/sim/run/._sim
spi/tags/initial/sim/run/tcl.scr
__MACOSX/spi/tags/initial/sim/run/._tcl.scr
__MACOSX/spi/tags/initial/sim/._run
__MACOSX/spi/tags/initial/._sim
__MACOSX/spi/tags/._initial
spi/tags/rel_1/
spi/tags/rel_1/bench/
spi/tags/rel_1/bench/verilog/
spi/tags/rel_1/bench/verilog/spi_slave_model.v
__MACOSX/spi/tags/rel_1/
__MACOSX/spi/tags/rel_1/bench/
__MACOSX/spi/tags/rel_1/bench/verilog/
__MACOSX/spi/tags/rel_1/bench/verilog/._spi_slave_model.v
spi/tags/rel_1/bench/verilog/tb_spi_top.v
__MACOSX/spi/tags/rel_1/bench/verilog/._tb_spi_top.v
spi/tags/rel_1/bench/verilog/wb_master_model.v
__MACOSX/spi/tags/rel_1/bench/verilog/._wb_master_model.v
__MACOSX/spi/tags/rel_1/bench/._verilog
__MACOSX/spi/tags/rel_1/._bench
spi/tags/rel_1/doc/
spi/tags/rel_1/doc/spi.pdf
__MACOSX/spi/tags/rel_1/doc/
__MACOSX/spi/tags/rel_1/doc/._spi.pdf
spi/tags/rel_1/doc/src/
spi/tags/rel_1/doc/src/spi.doc
__MACOSX/spi/tags/rel_1/doc/src/
__MACOSX/spi/tags/rel_1/doc/src/._spi.doc
__MACOSX/spi/tags/rel_1/doc/._src
__MACOSX/spi/tags/rel_1/._doc
spi/tags/rel_1/rtl/
spi/tags/rel_1/rtl/verilog/
spi/tags/rel_1/rtl/verilog/spi_clgen.v
__MACOSX/spi/tags/rel_1/rtl/
__MACOSX/spi/tags/rel_1/rtl/verilog/
__MACOSX/spi/tags/rel_1/rtl/verilog/._spi_clgen.v
spi/tags/rel_1/rtl/verilog/spi_defines.v
__MACOSX/spi/tags/rel_1/rtl/verilog/._spi_defines.v
spi/tags/rel_1/rtl/verilog/spi_shift.v
__MACOSX/spi/tags/rel_1/rtl/verilog/._spi_shift.v
spi/tags/rel_1/rtl/verilog/spi_top.v
__MACOSX/spi/tags/rel_1/rtl/verilog/._spi_top.v
spi/tags/rel_1/rtl/verilog/timescale.v
__MACOSX/spi/tags/rel_1/rtl/verilog/._timescale.v
__MACOSX/spi/tags/rel_1/rtl/._verilog
__MACOSX/spi/tags/rel_1/._rtl
spi/tags/rel_1/sim/
spi/tags/rel_1/sim/run/
spi/tags/rel_1/sim/run/sim
__MACOSX/spi/tags/rel_1/sim/
__MACOSX/spi/tags/rel_1/sim/run/
__MACOSX/spi/tags/rel_1/sim/run/._sim
spi/tags/rel_1/sim/run/tcl.scr
__MACOSX/spi/tags/rel_1/sim/run/._tcl.scr
__MACOSX/spi/tags/rel_1/sim/._run
__MACOSX/spi/tags/rel_1/._sim
__MACOSX/spi/tags/._rel_1
spi/tags/rel_2/
spi/tags/rel_2/bench/
spi/tags/rel_2/bench/verilog/
spi/tags/rel_2/bench/verilog/spi_slave_model.v
spi/tags/rel_2/bench/verilog/tb_spi_top.v
__MACOSX/spi/tags/rel_2/
__MACOSX/spi/tags/rel_2/bench/
__MACOSX/spi/tags/rel_2/bench/verilog/
__MACOSX/spi/tags/rel_2/bench

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 搜珍网是交换下载平台,只提供交流渠道,下载内容来自于网络,除下载问题外,其它问题请自行百度。更多...
  • 本站已设置防盗链,请勿用迅雷、QQ旋风等下载软件下载资源,下载后用WinRAR最新版进行解压.
  • 如果您发现内容无法下载,请稍后再次尝试;或换浏览器;或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎,请到消费记录里找到下载记录反馈给我们,经确认后退回积分.
  • 如下载前有疑问,可以通过点击"提供者"的名字,查看对方的联系方式,联系对方咨询.

相关评论

暂无评论内容.

发表评论

*快速评论: 推荐 一般 有密码 和说明不符 不是源码或资料 文件不全 不能解压 纯粹是垃圾
*内  容:
*验 证 码:
搜珍网 www.dssz.com