文件名称:Chapter-7
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练习七在verilog hdl中使用任务（task）319
-• Source code of designs in chapters 1 to 8.
• Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files.
• Several Designs, including SAYEH, that are programmed on Altera’s UP2 board are included in “Quartus UP2 Designs.zip”
• The OVL directory has OVL library version 1.0 and its documentations
• In the Software directory, the Altera directory contains Quartus II, related tools, and Altera device specifications. Please connect to www.altera.com and then click on “University Program” to obtain a license for Quartus II Web Edition.
• In the Software directory, The MentorGraphics directory has the ModelSim-Altera simulation program. Please connect to www.altera.com and then click on “University Program” to obtain a license for ModelSim-Altera.
-• Source code of designs in chapters 1 to 8.
• Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files.
• Several Designs, including SAYEH, that are programmed on Altera’s UP2 board are included in “Quartus UP2 Designs.zip”
• The OVL directory has OVL library version 1.0 and its documentations
• In the Software directory, the Altera directory contains Quartus II, related tools, and Altera device specifications. Please connect to www.altera.com and then click on “University Program” to obtain a license for Quartus II Web Edition.
• In the Software directory, The MentorGraphics directory has the ModelSim-Altera simulation program. Please connect to www.altera.com and then click on “University Program” to obtain a license for ModelSim-Altera.
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下载文件列表
Chapter 7/an_nmos.v
Chapter 7/aoi_3d.v
Chapter 7/barrel_shifter.v
Chapter 7/barrel_shifter_reg.v
Chapter 7/cross_couple.v
Chapter 7/dynamic_cell.v
Chapter 7/d_latch.v
Chapter 7/half_reg.v
Chapter 7/master_slave_dff.v
Chapter 7/mos_strength.v
Chapter 7/nand2_1d.v
Chapter 7/Problem6.v
Chapter 7/register_4.v
Chapter 7/shifter.v
Chapter 7/test_an_nmos.v
Chapter 7/test_aoi_3d.v
Chapter 7/test_barrel_shifter.v
Chapter 7/test_barrel_shifter_reg.v
Chapter 7/test_cross_couple.v
Chapter 7/test_dynamic_cell.v
Chapter 7/test_d_latch.v
Chapter 7/test_half_reg.v
Chapter 7/test_master_slave_dff.v
Chapter 7/test_mos_strength.v
Chapter 7/test_nand2_1d.v
Chapter 7/test_register_4.v
Chapter 7/test_shifter.v
Chapter 7/test_wired_strength.v
Chapter 7/wired_strength.v
Chapter 7
Chapter 7/aoi_3d.v
Chapter 7/barrel_shifter.v
Chapter 7/barrel_shifter_reg.v
Chapter 7/cross_couple.v
Chapter 7/dynamic_cell.v
Chapter 7/d_latch.v
Chapter 7/half_reg.v
Chapter 7/master_slave_dff.v
Chapter 7/mos_strength.v
Chapter 7/nand2_1d.v
Chapter 7/Problem6.v
Chapter 7/register_4.v
Chapter 7/shifter.v
Chapter 7/test_an_nmos.v
Chapter 7/test_aoi_3d.v
Chapter 7/test_barrel_shifter.v
Chapter 7/test_barrel_shifter_reg.v
Chapter 7/test_cross_couple.v
Chapter 7/test_dynamic_cell.v
Chapter 7/test_d_latch.v
Chapter 7/test_half_reg.v
Chapter 7/test_master_slave_dff.v
Chapter 7/test_mos_strength.v
Chapter 7/test_nand2_1d.v
Chapter 7/test_register_4.v
Chapter 7/test_shifter.v
Chapter 7/test_wired_strength.v
Chapter 7/wired_strength.v
Chapter 7
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