是关于System Verilog的课件，简要介绍了了System Verilog的用法，主要介绍进行可仿真和可综合的硬件设计，作为Verilog的扩展，在抽象设计、测试平台和基于C语言的应用程序设计接口有重大改进。-About System Verilog courseware, brief introduction of System Verilog usage introduces conduct can be integrated simulation and hardware design, as Verilog extension in abstract design, test platform and based on the C language application programming interface has significant improvements.