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文件名称:divide-freq

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [PDF]
  • 上传时间：
    2015-04-30
  • 文件大小：
    2.7mb
  • 已下载：
    0次
  • 提 供 者：
    薛***
  • 相关连接：
    无
  • 下载说明：
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修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

基于XILINX芯片的verilog程序。调用DCM模块，完成50MHz转换75MHz，相位偏移90°-XILINX chip based on Verilog program. Call the DCM module to complete the 50MHz conversion, 75MHz, phase shift of 90 degrees
(系统自动生成,下载前可以参看下载内容)

下载文件列表

divide freq/exp6_6.gise
divide freq/exp6_6.xise
divide freq/exp6_6_ise12migration.zip
divide freq/fuse.log
divide freq/fuse.xmsgs
divide freq/fuseRelaunch.cmd
divide freq/ipcore_dir/coregen.cgp
divide freq/ipcore_dir/coregen.log
divide freq/ipcore_dir/create_pll.tcl
divide freq/ipcore_dir/create_s6_clock.tcl
divide freq/ipcore_dir/edit_s6_clock.tcl
divide freq/ipcore_dir/pll/clk_wiz_v3_6_readme.txt
divide freq/ipcore_dir/pll/doc/clk_wiz_v3_6_readme.txt
divide freq/ipcore_dir/pll/doc/clk_wiz_v3_6_vinfo.html
divide freq/ipcore_dir/pll/doc/pg065_clk_wiz.pdf
divide freq/ipcore_dir/pll/example_design/pll_exdes.ucf
divide freq/ipcore_dir/pll/example_design/pll_exdes.v
divide freq/ipcore_dir/pll/example_design/pll_exdes.xdc
divide freq/ipcore_dir/pll/implement/implement.bat
divide freq/ipcore_dir/pll/implement/implement.sh
divide freq/ipcore_dir/pll/implement/planAhead_ise.bat
divide freq/ipcore_dir/pll/implement/planAhead_ise.sh
divide freq/ipcore_dir/pll/implement/planAhead_ise.tcl
divide freq/ipcore_dir/pll/implement/planAhead_rdn.bat
divide freq/ipcore_dir/pll/implement/planAhead_rdn.sh
divide freq/ipcore_dir/pll/implement/planAhead_rdn.tcl
divide freq/ipcore_dir/pll/implement/xst.prj
divide freq/ipcore_dir/pll/implement/xst.scr
divide freq/ipcore_dir/pll/simulation/functional/simcmds.tcl
divide freq/ipcore_dir/pll/simulation/functional/simulate_isim.bat
divide freq/ipcore_dir/pll/simulation/functional/simulate_isim.sh
divide freq/ipcore_dir/pll/simulation/functional/simulate_mti.bat
divide freq/ipcore_dir/pll/simulation/functional/simulate_mti.do
divide freq/ipcore_dir/pll/simulation/functional/simulate_mti.sh
divide freq/ipcore_dir/pll/simulation/functional/simulate_ncsim.sh
divide freq/ipcore_dir/pll/simulation/functional/simulate_vcs.sh
divide freq/ipcore_dir/pll/simulation/functional/ucli_commands.key
divide freq/ipcore_dir/pll/simulation/functional/vcs_session.tcl
divide freq/ipcore_dir/pll/simulation/functional/wave.do
divide freq/ipcore_dir/pll/simulation/functional/wave.sv
divide freq/ipcore_dir/pll/simulation/pll_tb.v
divide freq/ipcore_dir/pll/simulation/timing/pll_tb.v
divide freq/ipcore_dir/pll/simulation/timing/sdf_cmd_file
divide freq/ipcore_dir/pll/simulation/timing/simcmds.tcl
divide freq/ipcore_dir/pll/simulation/timing/simulate_isim.sh
divide freq/ipcore_dir/pll/simulation/timing/simulate_mti.bat
divide freq/ipcore_dir/pll/simulation/timing/simulate_mti.do
divide freq/ipcore_dir/pll/simulation/timing/simulate_mti.sh
divide freq/ipcore_dir/pll/simulation/timing/simulate_ncsim.sh
divide freq/ipcore_dir/pll/simulation/timing/simulate_vcs.sh
divide freq/ipcore_dir/pll/simulation/timing/ucli_commands.key
divide freq/ipcore_dir/pll/simulation/timing/vcs_session.tcl
divide freq/ipcore_dir/pll/simulation/timing/wave.do
divide freq/ipcore_dir/pll.asy
divide freq/ipcore_dir/pll.gise
divide freq/ipcore_dir/pll.sym
divide freq/ipcore_dir/pll.ucf
divide freq/ipcore_dir/pll.v
divide freq/ipcore_dir/pll.veo
divide freq/ipcore_dir/pll.xco
divide freq/ipcore_dir/pll.xdc
divide freq/ipcore_dir/pll.xise
divide freq/ipcore_dir/pll_flist.txt
divide freq/ipcore_dir/pll_xmdf.tcl
divide freq/ipcore_dir/s6_clock/clk_wiz_v3_2_readme.txt
divide freq/ipcore_dir/s6_clock/clk_wiz_v3_6_readme.txt
divide freq/ipcore_dir/s6_clock/doc/clk_wiz_ds709.pdf
divide freq/ipcore_dir/s6_clock/doc/clk_wiz_gsg521.pdf
divide freq/ipcore_dir/s6_clock/doc/clk_wiz_v3_2_readme.txt
divide freq/ipcore_dir/s6_clock/doc/clk_wiz_v3_2_vinfo.html
divide freq/ipcore_dir/s6_clock/doc/clk_wiz_v3_6_readme.txt
divide freq/ipcore_dir/s6_clock/doc/clk_wiz_v3_6_vinfo.html
divide freq/ipcore_dir/s6_clock/doc/pg065_clk_wiz.pdf
divide freq/ipcore_dir/s6_clock/example_design/s6_clock_exdes.ucf
divide freq/ipcore_dir/s6_clock/example_design/s6_clock_exdes.v
divide freq/ipcore_dir/s6_clock/example_design/s6_clock_exdes.xdc
divide freq/ipcore_dir/s6_clock/generate/clk_wiz_v3_2_generate.tcl
divide freq/ipcore_dir/s6_clock/generate/clk_wiz_v3_2_model.tcl
divide freq/ipcore_dir/s6_clock/generate/run_legacy_tcl_flow.tcl
divide freq/ipcore_dir/s6_clock/implement/implement.bat
divide freq/ipcore_dir/s6_clock/implement/implement.sh
divide freq/ipcore_dir/s6_clock/implement/planAhead_ise.bat
divide freq/ipcore_dir/s6_clock/implement/planAhead_ise.sh
divide freq/ipcore_dir/s6_clock/implement/planAhead_ise.tcl
divide freq/ipcore_dir/s6_clock/implement/planAhead_rdn.bat
divide freq/ipcore_dir/s6_clock/implement/planAhead_rdn.sh
divide freq/ipcore_dir/s6_clock/implement/planAhead_rdn.tcl
divide freq/ipcore_dir/s6_clock/implement/xst.prj
divide freq/ipcore_dir/s6_clock/implement/xst.scr
divide freq/ipcore_dir/s6_clock/s6_clock.ucf
divide freq/ipcore_dir/s6_clock/s6_clock.xdc
divide freq/ipcore_dir/s6_clock/simulation/functional/simcmds.tcl
divide freq/ipcore_dir/s6_clock/simulation/functional/simulate_isim.bat
divide freq/ipcore_dir/s6_clock/simulation/functional/simulate_isim.sh
divide freq/ipcore_dir/s6_clock/simulation/functional/simulate_mti.bat
divide freq/ipcore_dir/s6_clock/simulation/functional/simulate_mti.do
divide freq/ipcore_dir/s6_clock/simulation/functional/simulate_mti.sh
divid

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