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文件名称:verilog

  • 所属分类：
    VHDL编程
  • 标签属性：
    [WORD]
  • 上传时间：
    2008-10-13
  • 文件大小：
    388.75kb
  • 已下载：
    0次
  • 提 供 者：
    严****
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verilog原理与应用

作者：Michael D. Ciletti


(系统自动生成,下载前可以参看下载内容)

下载文件列表

Models and Testbenches 11_10_2004/README.txt
Models and Testbenches 11_10_2004/_vti_cnf/Models and Testbenches 05_10_2004.rar
Models and Testbenches 11_10_2004/_vti_cnf/Models and Testbenches 05_10_2004.zip
Models and Testbenches 11_10_2004/_vti_cnf/Models and Testbenches10_6_04.zip
Models and Testbenches 11_10_2004/_vti_cnf
Models and Testbenches 11_10_2004/Clock generator/clock.v
Models and Testbenches 11_10_2004/Clock generator/clock_1_2.v
Models and Testbenches 11_10_2004/Clock generator/clock_gen.v
Models and Testbenches 11_10_2004/Clock generator/Clock_Prog.v
Models and Testbenches 11_10_2004/Clock generator/Clock_Unit.v
Models and Testbenches 11_10_2004/Clock generator
Models and Testbenches 11_10_2004/Chapter 9/ADDVB_Models_9.doc
Models and Testbenches 11_10_2004/Chapter 9/_vti_cnf/ADDVB_Models_9.doc
Models and Testbenches 11_10_2004/Chapter 9/_vti_cnf
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/Image_Converter_0.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/Image_Converter_1.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/Image_converter_2.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/Image_Converter_Baseline.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/t_Image_Converter_0.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/t_Image_Converter_1.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/t_Image_Converter_2.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/t_Image_Converter_Baseline.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/_vti_cnf/Image_Converter_0.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/_vti_cnf/Image_Converter_1.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/_vti_cnf/Image_converter_2.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/_vti_cnf/Image_Converter_Baseline.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/_vti_cnf/t_Image_Converter_0.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/_vti_cnf/t_Image_Converter_1.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/_vti_cnf/t_Image_Converter_2.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/_vti_cnf/t_Image_Converter_Baseline.v
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter/_vti_cnf
Models and Testbenches 11_10_2004/Chapter 9/Pixel Converter
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/Circular_Buffer_1.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/Circular_Buffer_2.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/FIFO_Buffer.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/Ser_Par_Conv_32.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/Ser_Par_Conv_8.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/t_Circular_Buffers.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/t_FIFO_Buffer.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/t_FIFO_Clock_Domain_Synch.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/t_Ser_Par_Conv_32.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/t_Ser_Par_Conv_8.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/t_write_synch.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/write_synch.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/_vti_cnf/Circular_Buffer_1.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/_vti_cnf/Circular_Buffer_2.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/_vti_cnf/FIFO_Buffer.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/_vti_cnf/Ser_Par_Conv_32.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/_vti_cnf/Ser_Par_Conv_8.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/_vti_cnf/t_Circular_Buffers.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/_vti_cnf/t_FIFO_Buffer.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/_vti_cnf/t_FIFO_Clock_Domain_Synch.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/_vti_cnf/t_Ser_Par_Conv_32.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/_vti_cnf/t_Ser_Par_Conv_8.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/_vti_cnf/t_write_synch.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/_vti_cnf/write_synch.v
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO/_vti_cnf
Models and Testbenches 11_10_2004/Chapter 9/Pipeline and FIFO
Models and Testbenches 11_10_2004/Chapter 9/DSP/decimator_1.v
Models and Testbenches 11_10_2004/Chapter 9/DSP/decimator_2.v
Models and Testbenches 11_10_2004/Chapter 9/DSP/decimator_3.v
Models and Testbenches 11_10_2004/Chapter 9/DSP/FIR_Gaussian.v
Models and Testbenches 11_10_2004/Chapter 9/DSP/IIR_Filter.v
Models and Testbenches 11_10_2004/Chapter 9/DSP/integrator_par.v
Models and Testbenches 11_10_2004/Chapter 9/DSP/Integrator_Seq.v
Models and Testbenches 11_10_2004/Chapter 9/DSP/test_FIR_Gaussian.v
Models and Testbenches 11_10_2004/Chapt

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