实现16位的cpu设计 内容使用verilog hdl实现，具体的实现步骤方法，都已经写到文档里面去了！,To achieve 16-bit design of the contents of the cpu using verilog hdl achieve, the specific methods to achieve these steps have already been written inside the document went to!

全球最大的MCU设计公司Microchip 的16C57, 指令完全兼容的clone版本 一并附上说明文件与组合语言测试档-The world largest MCU design Microchip 16C57, fully compatible with the clone version of the directive be accompanied by documentation and assembly language test file