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Firefly_MV_USB_Gettin_Started_Manual
- Firefly MV USB Getting Started Manual 的相关介绍- some introduction about Firefly MV USB Getting Started Manual
cpu
- 一个简单的CPU设计,支持add,sub,mvi,mv四条指令,用Verilog语言编写,在Quratus II上编译通过,仿真正确。-A simple CPU design, support add, sub, mvi, mv four instructions, with the Verilog language, compiled by the Quratus II, the simulation is correct.
AD_TEST
- 1、 本工程主要是把输人AD芯片的电压显示在数码管上。 2、 测试时,从JTAG口把AD_TEST.sof下载到FPGA,右边的4个数码管将会显示电压数据(单位:毫伏)。 -1, this project is mainly to AD input voltage displayed on the digital chip tube. 2 test, from the JTAG port to AD_TEST.sof download to the FPGA, the right o
WorkOneBetaC
- 低频数字相位测量仪 Verilog源代码 经过实测可用 信号频率20Hz-20KHz,步进20Hz 幅值0-5V,步进40mV。-Verilog code Through the measured signal frequency available 20 hz- 20 KHZ, step 20 hz Amplitude 0 to 5 v, stepping 40 mv.