搜索资源列表
sv-design_book_examples
- system verilog design book examples
i2s_vmm
- inter IC Sound design with test bench written in Verification Methodology Manual.
sv-for-Verification-2nd
- System Verilog for Verification, 2nd Edition.非常经典的资料，供IC开发的人员作自测平台或者验证的人员使用-System Verilog for Verification, 2nd Edition. Very classic information for IC self-test platform for the development of personnel for use by or verification
sva
- sva断言，Assertions on overlapping behaviour with SVA-Assertions on overlapping behaviour with SV
sv
- stack and events in system verilog
transaction class.sv
- transaction class for APB
sv code for ic
- System verilog code for generator class
sv-reference-doc
- systemverilog入门 用于IC验证-for test
sva_lab
- SV验证例子 SV验证例子 -system verilog
SV-Tasks-a-Functions-Intro
- system Verilog tasks & functions introduction
SV-Priority
- system Verilog priority
SV-Combinational-Logic
- system Verilog combinational logic
syn_dp_fifo.v
- 同步双端口FIFO, 可同时读写，FIFO深度宽度可通过参数配置，带SV断言测试。(Dual Port Synchronization FIFO for ASIC/FPGA)
spi_vip
- SPI verifcation in sv
ahb_sramc_svtb
- ahb总线Verilog代码及sv仿真文件(ahb bus Verilog code and sv simulation code)
基于ahb总线的sramc设计与验证（SV，uvm）
- 基于ahb总线的sramc设计与验证（E课网）