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aFifo
- verylog语言编程，为异步flipflop的程序。具有数据传输功能，数据位数可以用户设定
VHDLsourcecode
- source code for counter, freq devider, traffic light, stepper motor, flipflop
Flipflop
- flip flop project and explanation
part4
- d flipflop using verilog
New-Folder
- it is a verilog code for masterslave flipflop
d-flipflop
- D flip flop designing in ASIC
code
- Basic codes in VHDL like d flipflop,register -Basic codes in VHDL like d flipflop,register ............